In non-coherent DMA mode, kernel uses cache flushing operations to
maintain I/O coherency, so the dmapool objects should be aligned to
ARCH_DMA_MINALIGN.
Cc: sta...@vger.kernel.org
Signed-off-by: Huacai Chen
---
mm/dmapool.c | 3 +++
1 file changed, 3 insertions(+)
diff
In non-coherent DMA mode, kernel uses cache flushing operations to
maintain I/O coherency, so the dmapool objects should be aligned to
ARCH_DMA_MINALIGN.
Cc: sta...@vger.kernel.org
Signed-off-by: Huacai Chen
---
mm/dmapool.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/mm/dmapool.c
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