Re: [PATCH V3] perf: qcom: Add L3 cache PMU driver

2017-03-06 Thread Mark Rutland
Hi, On Mon, Mar 06, 2017 at 10:29:25AM -0500, Agustin Vega-Frias wrote: > On 2017-03-03 09:50, Mark Rutland wrote: > >Hi Augustin, Apologies for the typo here, btw. > >On Thu, Mar 02, 2017 at 03:58:32PM -0500, Agustin Vega-Frias wrote: > >>The driver exports formatting and event information to

Re: [PATCH V3] perf: qcom: Add L3 cache PMU driver

2017-03-06 Thread Mark Rutland
Hi, On Mon, Mar 06, 2017 at 10:29:25AM -0500, Agustin Vega-Frias wrote: > On 2017-03-03 09:50, Mark Rutland wrote: > >Hi Augustin, Apologies for the typo here, btw. > >On Thu, Mar 02, 2017 at 03:58:32PM -0500, Agustin Vega-Frias wrote: > >>The driver exports formatting and event information to

Re: [PATCH V3] perf: qcom: Add L3 cache PMU driver

2017-03-06 Thread Agustin Vega-Frias
Hi Mark, On 2017-03-03 09:50, Mark Rutland wrote: Hi Augustin, On Thu, Mar 02, 2017 at 03:58:32PM -0500, Agustin Vega-Frias wrote: This adds a new dynamic PMU to the Perf Events framework to program and control the L3 cache PMUs in some Qualcomm Technologies SOCs. The driver supports a

Re: [PATCH V3] perf: qcom: Add L3 cache PMU driver

2017-03-06 Thread Agustin Vega-Frias
Hi Mark, On 2017-03-03 09:50, Mark Rutland wrote: Hi Augustin, On Thu, Mar 02, 2017 at 03:58:32PM -0500, Agustin Vega-Frias wrote: This adds a new dynamic PMU to the Perf Events framework to program and control the L3 cache PMUs in some Qualcomm Technologies SOCs. The driver supports a

Re: [PATCH V3] perf: qcom: Add L3 cache PMU driver

2017-03-03 Thread Mark Rutland
Hi Augustin, On Thu, Mar 02, 2017 at 03:58:32PM -0500, Agustin Vega-Frias wrote: > This adds a new dynamic PMU to the Perf Events framework to program > and control the L3 cache PMUs in some Qualcomm Technologies SOCs. > > The driver supports a distributed cache architecture where the overall >

Re: [PATCH V3] perf: qcom: Add L3 cache PMU driver

2017-03-03 Thread Mark Rutland
Hi Augustin, On Thu, Mar 02, 2017 at 03:58:32PM -0500, Agustin Vega-Frias wrote: > This adds a new dynamic PMU to the Perf Events framework to program > and control the L3 cache PMUs in some Qualcomm Technologies SOCs. > > The driver supports a distributed cache architecture where the overall >

[PATCH V3] perf: qcom: Add L3 cache PMU driver

2017-03-02 Thread Agustin Vega-Frias
This adds a new dynamic PMU to the Perf Events framework to program and control the L3 cache PMUs in some Qualcomm Technologies SOCs. The driver supports a distributed cache architecture where the overall cache for a socket is comprised of multiple slices each with its own PMU. Access to each

[PATCH V3] perf: qcom: Add L3 cache PMU driver

2017-03-02 Thread Agustin Vega-Frias
This adds a new dynamic PMU to the Perf Events framework to program and control the L3 cache PMUs in some Qualcomm Technologies SOCs. The driver supports a distributed cache architecture where the overall cache for a socket is comprised of multiple slices each with its own PMU. Access to each