On 9/5/2019 3:04 PM, Lorenzo Pieralisi wrote:
On Thu, Sep 05, 2019 at 01:44:46PM +0530, Vidya Sagar wrote:
Hi Lorenzo / Bjorn,
Can you please review this series?
I have Reviewed-by and Acked-by from Rob, Thierry and Andrew already.
Rebase it on top of my pci/tegra branch (it does not apply),
On Thu, Sep 05, 2019 at 01:44:46PM +0530, Vidya Sagar wrote:
> Hi Lorenzo / Bjorn,
> Can you please review this series?
> I have Reviewed-by and Acked-by from Rob, Thierry and Andrew already.
Rebase it on top of my pci/tegra branch (it does not apply),
resend it and I will merge it.
Thanks,
Hi Lorenzo / Bjorn,
Can you please review this series?
I have Reviewed-by and Acked-by from Rob, Thierry and Andrew already.
Thanks,
Vidya Sagar
On 8/28/2019 10:58 PM, Vidya Sagar wrote:
This patch series enables Tegra194's C5 controller which owns x16 slot in
p2972- platform. C5
This patch series enables Tegra194's C5 controller which owns x16 slot in
p2972- platform. C5 controller's PERST# and CLKREQ# are not configured as
output and bi-directional signals by default and hence they need to be
configured explicitly. Also, x16 slot's 3.3V and 12V supplies are
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