RE: [PATCH V3 01/10] mmc: tegra: fix ddr signaling for non-ddr modes

2019-03-23 Thread Sowjanya Komatineni
> > > > ddr_signaling is set to true for DDR50 and DDR52 modes but is not > > set back to false for other modes. This programs incorrect host > > clock when mode change happens from DDR52/DDR50 to other SDR or HS > > modes like incase of mmc_retune where it switches from HS400 to HS > > DDR and

RE: [PATCH V3 01/10] mmc: tegra: fix ddr signaling for non-ddr modes

2019-03-21 Thread Sowjanya Komatineni
> > > > ddr_signaling is set to true for DDR50 and DDR52 modes but is not set > > back to false for other modes. This programs incorrect host clock when > > mode change happens from DDR52/DDR50 to other SDR or HS modes like > > incase of mmc_retune where it switches from HS400 to HS DDR and then

Re: [PATCH V3 01/10] mmc: tegra: fix ddr signaling for non-ddr modes

2019-03-21 Thread Ulf Hansson
On Wed, 13 Mar 2019 at 22:45, Sowjanya Komatineni wrote: > > ddr_signaling is set to true for DDR50 and DDR52 modes but is > not set back to false for other modes. This programs incorrect > host clock when mode change happens from DDR52/DDR50 to other > SDR or HS modes like incase of mmc_retune wh

[PATCH V3 01/10] mmc: tegra: fix ddr signaling for non-ddr modes

2019-03-13 Thread Sowjanya Komatineni
ddr_signaling is set to true for DDR50 and DDR52 modes but is not set back to false for other modes. This programs incorrect host clock when mode change happens from DDR52/DDR50 to other SDR or HS modes like incase of mmc_retune where it switches from HS400 to HS DDR and then from HS DDR to HS mode