[PATCH V3 07/26] csky: MMU and page table management

2018-09-05 Thread Guo Ren
- abiv1 CPU (CK610) is VIPT cache and it doesn't support highmem. - abiv2 CPUs are all PIPT cache and they could support highmem. Here is our memory layout plan: Fixmap : 0xffc02000 – 0xf000 (4 MB - 12KB) Pkmap: 0xff80 – 0xffc0 (4 MB) Vmalloc

[PATCH V3 07/26] csky: MMU and page table management

2018-09-05 Thread Guo Ren
- abiv1 CPU (CK610) is VIPT cache and it doesn't support highmem. - abiv2 CPUs are all PIPT cache and they could support highmem. Here is our memory layout plan: Fixmap : 0xffc02000 – 0xf000 (4 MB - 12KB) Pkmap: 0xff80 – 0xffc0 (4 MB) Vmalloc