Hi Bjorn
Thanks for your review.
在 2016/11/3 7:40, Bjorn Helgaas 写道:
On Thu, Oct 20, 2016 at 11:10:34AM +0800, Dongdong Liu wrote:
PCIe controller in Hip05/HIP06/HIP07 SoCs is not ECAM compliant.
It is non ECAM only for the RC bus config space;for any other bus
underneath the root bus we suppo
On Thu, Oct 20, 2016 at 11:10:34AM +0800, Dongdong Liu wrote:
> PCIe controller in Hip05/HIP06/HIP07 SoCs is not ECAM compliant.
> It is non ECAM only for the RC bus config space;for any other bus
> underneath the root bus we support ECAM access.
> Add specific quirks for PCI config space accessors
On Mon, Oct 24, 2016 at 02:56:37PM +0800, Dongdong Liu wrote:
[...]
> >The PNP0A08 acpi_device (that is what is pointed at by
> >struct acpi_device = to_acpi_device(pci_config_window.parent)
> >is the respective pci bridge device companion.
> >
> >arch/arm64/kernel/pci.c (pcibios_root_bridge_prep
Hi Lorenzo
Many thanks for your review.
在 2016/10/22 0:08, Lorenzo Pieralisi 写道:
On Fri, Oct 21, 2016 at 02:12:44PM +0800, Dongdong Liu wrote:
[...]
+static int hisi_pcie_init(struct pci_config_window *cfg)
+{
+ int ret;
+ struct acpi_device *adev = to_acpi_device(cfg->parent);
On Fri, Oct 21, 2016 at 02:12:44PM +0800, Dongdong Liu wrote:
[...]
> >>+static int hisi_pcie_init(struct pci_config_window *cfg)
> >>+{
> >>+ int ret;
> >>+ struct acpi_device *adev = to_acpi_device(cfg->parent);
> >
> >Why is this expected to be struct acpi_device?
>
> I use this a
Hi Rafael
Thanks for your review.
在 2016/10/20 20:27, Rafael J. Wysocki 写道:
On Thu, Oct 20, 2016 at 5:10 AM, Dongdong Liu wrote:
PCIe controller in Hip05/HIP06/HIP07 SoCs is not ECAM compliant.
It is non ECAM only for the RC bus config space;for any other bus
underneath the root bus we suppor
On Thu, Oct 20, 2016 at 5:10 AM, Dongdong Liu wrote:
> PCIe controller in Hip05/HIP06/HIP07 SoCs is not ECAM compliant.
> It is non ECAM only for the RC bus config space;for any other bus
> underneath the root bus we support ECAM access.
> Add specific quirks for PCI config space accessors.This in
PCIe controller in Hip05/HIP06/HIP07 SoCs is not ECAM compliant.
It is non ECAM only for the RC bus config space;for any other bus
underneath the root bus we support ECAM access.
Add specific quirks for PCI config space accessors.This involves:
1. New initialization call hisi_pcie_init() to obtain
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