Re: [PATCH V3 4/4] pwm: tegra: Add support to configure pin state in suspends/resume

2017-04-07 Thread Jon Hunter
On 07/04/17 10:34, Laxman Dewangan wrote: > In some of NVIDIA Tegra's platform, PWM controller is used to > control the PWM controlled regulators. PWM signal is connected to > the VID pin of the regulator where duty cycle of PWM signal decide > the voltage level of the regulator output. > > When

Re: [PATCH V3 4/4] pwm: tegra: Add support to configure pin state in suspends/resume

2017-04-07 Thread Jon Hunter
On 07/04/17 10:34, Laxman Dewangan wrote: > In some of NVIDIA Tegra's platform, PWM controller is used to > control the PWM controlled regulators. PWM signal is connected to > the VID pin of the regulator where duty cycle of PWM signal decide > the voltage level of the regulator output. > > When

[PATCH V3 4/4] pwm: tegra: Add support to configure pin state in suspends/resume

2017-04-07 Thread Laxman Dewangan
In some of NVIDIA Tegra's platform, PWM controller is used to control the PWM controlled regulators. PWM signal is connected to the VID pin of the regulator where duty cycle of PWM signal decide the voltage level of the regulator output. When system enters suspend, some PWM client/slave regulator

[PATCH V3 4/4] pwm: tegra: Add support to configure pin state in suspends/resume

2017-04-07 Thread Laxman Dewangan
In some of NVIDIA Tegra's platform, PWM controller is used to control the PWM controlled regulators. PWM signal is connected to the VID pin of the regulator where duty cycle of PWM signal decide the voltage level of the regulator output. When system enters suspend, some PWM client/slave regulator