Re: [PATCH V4 01/23] perf/x86: Support outputting XMM registers

2019-04-01 Thread Liang, Kan
On 4/1/2019 5:11 PM, Stephane Eranian wrote: diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index e2b1447192a8..9378c6b2128f 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -560,6 +560,16 @@ int x86_pmu_hw_config(struct perf_event *event)

Re: [PATCH V4 01/23] perf/x86: Support outputting XMM registers

2019-04-01 Thread Stephane Eranian
On Mon, Apr 1, 2019 at 12:54 PM Liang, Kan wrote: > > > > On 4/1/2019 3:18 PM, Stephane Eranian wrote: > > On Tue, Mar 26, 2019 at 9:11 AM wrote: > >> > >> From: Kan Liang > >> > >> Starting from Icelake, XMM registers can be collected in PEBS record. > >> But current code only output the

Re: [PATCH V4 01/23] perf/x86: Support outputting XMM registers

2019-04-01 Thread Liang, Kan
On 4/1/2019 3:18 PM, Stephane Eranian wrote: On Tue, Mar 26, 2019 at 9:11 AM wrote: From: Kan Liang Starting from Icelake, XMM registers can be collected in PEBS record. But current code only output the pt_regs. Add a new struct x86_perf_regs for both pt_regs and xmm_regs. XMM registers

Re: [PATCH V4 01/23] perf/x86: Support outputting XMM registers

2019-04-01 Thread Stephane Eranian
On Tue, Mar 26, 2019 at 9:11 AM wrote: > > From: Kan Liang > > Starting from Icelake, XMM registers can be collected in PEBS record. > But current code only output the pt_regs. > > Add a new struct x86_perf_regs for both pt_regs and xmm_regs. > XMM registers are 128 bit. To simplify the code,

[PATCH V4 01/23] perf/x86: Support outputting XMM registers

2019-03-26 Thread kan . liang
From: Kan Liang Starting from Icelake, XMM registers can be collected in PEBS record. But current code only output the pt_regs. Add a new struct x86_perf_regs for both pt_regs and xmm_regs. XMM registers are 128 bit. To simplify the code, they are handled like two different registers, which