Re: [PATCH V4 2/2] perf/x86: add sysfs entry to freeze counter on SMI

2017-03-28 Thread Ingo Molnar
* kan.li...@intel.com wrote: > +static void flip_smm_bit(void *data) > +{ > + int val = *(int *)data; > + > + msr_flip_bit(MSR_IA32_DEBUGCTLMSR, DEBUGCTLMSR_FREEZE_WHILE_SMM_BIT, > (bool)val); > +} BTW., you can probably shorten that and remove a type cast by using a more natural typ

Re: [PATCH V4 2/2] perf/x86: add sysfs entry to freeze counter on SMI

2017-03-28 Thread Thomas Gleixner
On Tue, 28 Mar 2017, kan.li...@intel.com wrote: > +static void flip_smm_bit(void *data) > +{ > + int val = *(int *)data; > + > + msr_flip_bit(MSR_IA32_DEBUGCTLMSR, DEBUGCTLMSR_FREEZE_WHILE_SMM_BIT, > (bool)val); I asked you before to use line breaks for lines over 80 chars. Is it that har

Re: [PATCH V4 2/2] perf/x86: add sysfs entry to freeze counter on SMI

2017-03-28 Thread Andi Kleen
> + if (x86_pmu.attr_freeze_on_smi == val) > + return count; > + > + mutex_lock(&freeze_on_smi_mutex); I don't think the mutex is really needed, but if it was it would need to include the previous check too to be atomic. > + > + get_online_cpus(); > + > + flip_smm_bit

[PATCH V4 2/2] perf/x86: add sysfs entry to freeze counter on SMI

2017-03-28 Thread kan . liang
From: Kan Liang Currently, the SMIs are visible to all performance counters. Because many users want to measure everything including SMIs. But in some cases, the SMI cycles should not be count. For example, to calculate the cost of SMI itself. So a knob is needed. When setting FREEZE_WHILE_SMM b