[RESEND PATCH V5, 0/5] Add MediaTek USB3 DRD Driver

2016-08-24 Thread Chunfeng Yun
>From e60d29d748a4e9f412c9bb08458083e97d3f523d Mon Sep 17 00:00:00 2001 From: Chunfeng Yun <chunfeng@mediatek.com> Date: Tue, 9 Aug 2016 16:12:31 +0800 Subject: [PATCH V5, 0/5] Add MediaTek USB3 DRD Driver These patches introduce the MediaTek USB3 dual-role controller driver. The d

[RESEND PATCH V5, 0/5] Add MediaTek USB3 DRD Driver

2016-08-24 Thread Chunfeng Yun
>From e60d29d748a4e9f412c9bb08458083e97d3f523d Mon Sep 17 00:00:00 2001 From: Chunfeng Yun Date: Tue, 9 Aug 2016 16:12:31 +0800 Subject: [PATCH V5, 0/5] Add MediaTek USB3 DRD Driver These patches introduce the MediaTek USB3 dual-role controller driver. The driver can be configured as Dual-R

Re: [PATCH V5, 0/5] Add MediaTek USB3 DRD Driver

2016-08-24 Thread chunfeng yun
Hi, On Wed, 2016-08-24 at 13:29 +0200, Oliver Neukum wrote: > On Wed, 2016-08-24 at 14:42 +0800, chunfeng yun wrote: > > Dear all, > > > > Could you please help me to review the code? > > Is the structure > > struct qmu_gpd > > shared with the hardware? Do I read this correctly that >

Re: [PATCH V5, 0/5] Add MediaTek USB3 DRD Driver

2016-08-24 Thread chunfeng yun
Hi, On Wed, 2016-08-24 at 13:29 +0200, Oliver Neukum wrote: > On Wed, 2016-08-24 at 14:42 +0800, chunfeng yun wrote: > > Dear all, > > > > Could you please help me to review the code? > > Is the structure > > struct qmu_gpd > > shared with the hardware? Do I read this correctly that >

Re: [PATCH V5, 0/5] Add MediaTek USB3 DRD Driver

2016-08-24 Thread Oliver Neukum
On Wed, 2016-08-24 at 14:42 +0800, chunfeng yun wrote: > Dear all, > > Could you please help me to review the code? Is the structure struct qmu_gpd shared with the hardware? Do I read this correctly that you do PIO to endpoint 0 but DMA to the others? Could you resend the series?

Re: [PATCH V5, 0/5] Add MediaTek USB3 DRD Driver

2016-08-24 Thread Oliver Neukum
On Wed, 2016-08-24 at 14:42 +0800, chunfeng yun wrote: > Dear all, > > Could you please help me to review the code? Is the structure struct qmu_gpd shared with the hardware? Do I read this correctly that you do PIO to endpoint 0 but DMA to the others? Could you resend the series?

Re: [PATCH V5, 0/5] Add MediaTek USB3 DRD Driver

2016-08-24 Thread chunfeng yun
Dear all, Could you please help me to review the code? Thank you very much. On Tue, 2016-08-09 at 16:23 +0800, Chunfeng Yun wrote: > These patches introduce the MediaTek USB3 dual-role controller > driver. > > The driver can be configured as Dual-Role Device (DRD), > Peripheral

Re: [PATCH V5, 0/5] Add MediaTek USB3 DRD Driver

2016-08-24 Thread chunfeng yun
Dear all, Could you please help me to review the code? Thank you very much. On Tue, 2016-08-09 at 16:23 +0800, Chunfeng Yun wrote: > These patches introduce the MediaTek USB3 dual-role controller > driver. > > The driver can be configured as Dual-Role Device (DRD), > Peripheral

[PATCH V5, 0/5] Add MediaTek USB3 DRD Driver

2016-08-09 Thread Chunfeng Yun
These patches introduce the MediaTek USB3 dual-role controller driver. The driver can be configured as Dual-Role Device (DRD), Peripheral Only and Host Only (xHCI) modes. It works well with Mass Storage, RNDIS and g_zero on FS/HS and SS. And it is tested on MT8173 platform which only contains

[PATCH V5, 0/5] Add MediaTek USB3 DRD Driver

2016-08-09 Thread Chunfeng Yun
These patches introduce the MediaTek USB3 dual-role controller driver. The driver can be configured as Dual-Role Device (DRD), Peripheral Only and Host Only (xHCI) modes. It works well with Mass Storage, RNDIS and g_zero on FS/HS and SS. And it is tested on MT8173 platform which only contains