Re: [PATCH V5 1/4] arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR0 register

2020-07-02 Thread Suzuki K Poulose
On 05/27/2020 04:03 AM, Anshuman Khandual wrote: Enable EVC, FGT, EXS features bits in ID_AA64MMFR0 register as per ARM DDI 0487F.a specification. Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Rutland Cc: Suzuki K Poulose Cc: linux-arm-ker...@lists.infradead.org Cc:

[PATCH V5 1/4] arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR0 register

2020-05-26 Thread Anshuman Khandual
Enable EVC, FGT, EXS features bits in ID_AA64MMFR0 register as per ARM DDI 0487F.a specification. Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Rutland Cc: Suzuki K Poulose Cc: linux-arm-ker...@lists.infradead.org Cc: linux-kernel@vger.kernel.org Suggested-by: Will Deacon Signed-off-by: