Re: [PATCH V5 3/6] perf, x86: large PEBS interrupt threshold

2015-03-30 Thread Peter Zijlstra
On Mon, Feb 23, 2015 at 09:25:53AM -0500, Kan Liang wrote: > +/* > + * Flags PEBS can handle without an PMI. > + * > + * TID can only be handled by flushing at context switch. > + */ > +#define PEBS_FREERUNNING_FLAGS \ > + (PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR | \ > +

Re: [PATCH V5 3/6] perf, x86: large PEBS interrupt threshold

2015-03-02 Thread Stephane Eranian
On Mon, Mar 2, 2015 at 12:59 PM, Andi Kleen wrote: >> At more reasonable periods, the benefit seems to vanish. I don't quite know >> of a scenario where one would absolutely need very small period. This is >> about statistical sampling and not tracing. > > In workloads with small irregular events

Re: [PATCH V5 3/6] perf, x86: large PEBS interrupt threshold

2015-03-02 Thread Andi Kleen
> At more reasonable periods, the benefit seems to vanish. I don't quite know > of a scenario where one would absolutely need very small period. This is > about statistical sampling and not tracing. In workloads with small irregular events (e.g. irregularly space event handlers that run for less t

Re: [PATCH V5 3/6] perf, x86: large PEBS interrupt threshold

2015-03-02 Thread Stephane Eranian
Hi, I spent some time looking at this patch series and testing some scenarios. On Mon, Feb 23, 2015 at 9:25 AM, Kan Liang wrote: > > From: Yan, Zheng > > PEBS always had the capability to log samples to its buffers without > an interrupt. Traditionally perf has not used this but always set the

[PATCH V5 3/6] perf, x86: large PEBS interrupt threshold

2015-02-23 Thread Kan Liang
From: Yan, Zheng PEBS always had the capability to log samples to its buffers without an interrupt. Traditionally perf has not used this but always set the PEBS threshold to one. For frequently occurring events (like cycles or branches or load/store) this in term requires using a relatively high