Re: [PATCH V6] perf: qcom: Add L3 cache PMU driver

2017-04-03 Thread Mark Rutland
On Fri, Mar 31, 2017 at 02:13:43PM -0400, Agustin Vega-Frias wrote: > This adds a new dynamic PMU to the Perf Events framework to program > and control the L3 cache PMUs in some Qualcomm Technologies SOCs. > > The driver supports a distributed cache architecture where the overall > cache for a

Re: [PATCH V6] perf: qcom: Add L3 cache PMU driver

2017-04-03 Thread Mark Rutland
On Fri, Mar 31, 2017 at 02:13:43PM -0400, Agustin Vega-Frias wrote: > This adds a new dynamic PMU to the Perf Events framework to program > and control the L3 cache PMUs in some Qualcomm Technologies SOCs. > > The driver supports a distributed cache architecture where the overall > cache for a

[PATCH V6] perf: qcom: Add L3 cache PMU driver

2017-03-31 Thread Agustin Vega-Frias
This adds a new dynamic PMU to the Perf Events framework to program and control the L3 cache PMUs in some Qualcomm Technologies SOCs. The driver supports a distributed cache architecture where the overall cache for a socket is comprised of multiple slices each with its own PMU. Access to each

[PATCH V6] perf: qcom: Add L3 cache PMU driver

2017-03-31 Thread Agustin Vega-Frias
This adds a new dynamic PMU to the Perf Events framework to program and control the L3 cache PMUs in some Qualcomm Technologies SOCs. The driver supports a distributed cache architecture where the overall cache for a socket is comprised of multiple slices each with its own PMU. Access to each