Hi Marc,
2016-08-01 16:46 GMT+09:00 Marc Zyngier :
> On 01/08/16 02:28, Masahiro Yamada wrote:
>> 2016-07-29 17:10 GMT+09:00 Marc Zyngier :
>>> On 29/07/16 04:53, Masahiro Yamada wrote:
Hi.
I noticed my board would not work any more
when pulling recent updates.
On 01/08/16 02:28, Masahiro Yamada wrote:
> 2016-07-29 17:10 GMT+09:00 Marc Zyngier :
>> On 29/07/16 04:53, Masahiro Yamada wrote:
>>> Hi.
>>>
>>>
>>> I noticed my board would not work any more
>>> when pulling recent updates.
>>>
>>>
>>> I did "git-bisect" and I found the following commit is it.
>
Hi Jon,
2016-07-29 17:31 GMT+09:00 Jon Hunter :
>
> On 29/07/16 04:53, Masahiro Yamada wrote:
>> Hi.
>>
>> I noticed my board would not work any more
>> when pulling recent updates.
>>
>> I did "git-bisect" and I found the following commit is it.
>>
>> commit 1e2a7d78499ec8859d2b469051b7b80bad3b08
2016-07-29 17:10 GMT+09:00 Marc Zyngier :
> On 29/07/16 04:53, Masahiro Yamada wrote:
>> Hi.
>>
>>
>> I noticed my board would not work any more
>> when pulling recent updates.
>>
>>
>> I did "git-bisect" and I found the following commit is it.
>
> It would help if you did post the log showing the
On 29/07/16 04:53, Masahiro Yamada wrote:
> Hi.
>
> I noticed my board would not work any more
> when pulling recent updates.
>
> I did "git-bisect" and I found the following commit is it.
>
> commit 1e2a7d78499ec8859d2b469051b7b80bad3b08aa
> Author: Jon Hunter
> Date: Tue Jun 7 16:12:28 201
On 29/07/16 04:53, Masahiro Yamada wrote:
> Hi.
>
>
> I noticed my board would not work any more
> when pulling recent updates.
>
>
> I did "git-bisect" and I found the following commit is it.
It would help if you did post the log showing the failure.
What if you apply the following patch:
h
Hi.
I noticed my board would not work any more
when pulling recent updates.
I did "git-bisect" and I found the following commit is it.
commit 1e2a7d78499ec8859d2b469051b7b80bad3b08aa
Author: Jon Hunter
Date: Tue Jun 7 16:12:28 2016 +0100
irqdomain: Don't set type when mapping an IRQ
Some IRQ chips, such as GPIO controllers or secondary level interrupt
controllers, may require require additional runtime power management
control to ensure they are accessible. For such IRQ chips, it makes sense
to enable the IRQ chip when interrupts are requested and disabled them
again once all
8 matches
Mail list logo