01.02.2019 7:19, Sowjanya Komatineni пишет:
>> +if (dma) {
>> +if (i2c_dev->msg_read) {
>> +chan = i2c_dev->rx_dma_chan;
>> +tegra_i2c_config_fifo_trig(i2c_dev,
>> xfer_size,
>> +
>> DATA_DMA_DIR_RX)
> > > > > + if (dma) {
> > > > > + if (i2c_dev->msg_read) {
> > > > > + chan = i2c_dev->rx_dma_chan;
> > > > > + tegra_i2c_config_fifo_trig(i2c_dev,
> > > > > xfer_size,
> > > > > +
> > > > > DATA_DMA_DIR_RX);
> > > > > +
> > > > > dma_sync_si
В Fri, 1 Feb 2019 01:11:06 +
Sowjanya Komatineni пишет:
> > > > + if (dma) {
> > > > + if (i2c_dev->msg_read) {
> > > > + chan = i2c_dev->rx_dma_chan;
> > > > + tegra_i2c_config_fifo_trig(i2c_dev,
> > > > xfer_size,
> > > > +
> >
> > > + if (dma) {
> > > + if (i2c_dev->msg_read) {
> > > + chan = i2c_dev->rx_dma_chan;
> > > + tegra_i2c_config_fifo_trig(i2c_dev,
> > > xfer_size,
> > > +
> > > DATA_DMA_DIR_RX);
> > > + dma_sync_single_for_device(i2c_dev->dev,
> > > +
> >
В Thu, 31 Jan 2019 21:46:48 +
Sowjanya Komatineni пишет:
> > It works with this change:
> >
> > diff --git a/drivers/i2c/busses/i2c-tegra.c
> > b/drivers/i2c/busses/i2c-tegra.c index fe5b89abc576..8e059e94b94e
> > 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++
> > b/drivers/i2c/busses/i2c-te
В Thu, 31 Jan 2019 13:44:23 +0100
Thierry Reding пишет:
> On Wed, Jan 30, 2019 at 10:16:25PM -0800, Sowjanya Komatineni wrote:
> > This patch adds DMA support for Tegra I2C.
> >
> > Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> > transfer size of the max FIFO depth and DMA mo
> It works with this change:
>
> diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
> index fe5b89abc576..8e059e94b94e 100644
> --- a/drivers/i2c/busses/i2c-tegra.c
> +++ b/drivers/i2c/busses/i2c-tegra.c
> @@ -1170,10 +1170,11 @@ static int tegra_i2c_xfer_msg(struct tegra
>>>
>> BUG_ON line is not part of this change. It was already there in existing
>> driver.
>> Based on log, I see DMA transfer is done for 224 bytes followed by 1
>> successful PIO transfer and then on next PIO transfer it received packet
>> xfer complete interrupt with incomplete transfer byt
31.01.2019 20:25, Dmitry Osipenko пишет:
> 31.01.2019 20:11, Dmitry Osipenko пишет:
>> 31.01.2019 19:56, Sowjanya Komatineni пишет:
>>>
>> drivers/i2c/busses/Kconfig | 2 +-
>> drivers/i2c/busses/i2c-tegra.c | 362
>> ++---
>> 2 files chan
31.01.2019 20:11, Dmitry Osipenko пишет:
> 31.01.2019 19:56, Sowjanya Komatineni пишет:
>>
> drivers/i2c/busses/Kconfig | 2 +-
> drivers/i2c/busses/i2c-tegra.c | 362
> ++---
> 2 files changed, 339 insertions(+), 25 deletions(-)
31.01.2019 19:56, Sowjanya Komatineni пишет:
>
drivers/i2c/busses/Kconfig | 2 +-
drivers/i2c/busses/i2c-tegra.c | 362
++---
2 files changed, 339 insertions(+), 25 deletions(-)
>>>
>>> Tegra20 crashes because of this patch:
>>>
>> [s
> >> drivers/i2c/busses/Kconfig | 2 +-
> >> drivers/i2c/busses/i2c-tegra.c | 362
> >> ++---
> >> 2 files changed, 339 insertions(+), 25 deletions(-)
> >
> > Tegra20 crashes because of this patch:
> >
> [snip]
> > <4>[3.395915] [ cut h
> > +static int tegra_i2c_init_dma_param(struct tegra_i2c_dev *i2c_dev) {
> > + struct dma_chan *dma_chan;
> > + u32 *dma_buf;
> > + dma_addr_t dma_phys;
> > +
> > + if (!i2c_dev->has_dma)
> > + return -EINVAL;
> > +
> > + if (!i2c_dev->rx_dma_chan) {
> > + dma_chan =
31.01.2019 18:12, Dmitry Osipenko пишет:
> 31.01.2019 9:16, Sowjanya Komatineni пишет:
>> This patch adds DMA support for Tegra I2C.
>>
>> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
>> transfer size of the max FIFO depth and DMA mode is used for
>> transfer size higher than max
31.01.2019 9:16, Sowjanya Komatineni пишет:
> This patch adds DMA support for Tegra I2C.
>
> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> transfer size of the max FIFO depth and DMA mode is used for
> transfer size higher than max FIFO depth to save CPU overhead.
>
> PIO mode
On Wed, Jan 30, 2019 at 10:16:25PM -0800, Sowjanya Komatineni wrote:
> This patch adds DMA support for Tegra I2C.
>
> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> transfer size of the max FIFO depth and DMA mode is used for
> transfer size higher than max FIFO depth to save CP
This patch adds DMA support for Tegra I2C.
Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
transfer size of the max FIFO depth and DMA mode is used for
transfer size higher than max FIFO depth to save CPU overhead.
PIO mode needs full intervention of CPU to fill or empty FIFO's
an
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