On Tue, Mar 23, 2021 at 6:33 PM Ilya Lipnitskiy
wrote:
>
> On Thu, Mar 11, 2021 at 9:41 AM Andrew Lunn wrote:
> >
> > On Wed, Mar 10, 2021 at 06:09:52PM -0800, Ilya Lipnitskiy wrote:
> > > A recent change to MIPS ralink reset logic made it so mt7530 actually
> > > resets the switch on platforms s
On Thu, Mar 11, 2021 at 9:41 AM Andrew Lunn wrote:
>
> On Wed, Mar 10, 2021 at 06:09:52PM -0800, Ilya Lipnitskiy wrote:
> > A recent change to MIPS ralink reset logic made it so mt7530 actually
> > resets the switch on platforms such as mt7621 (where bit 2 is the reset
> > line for the switch). Th
On Wed, Mar 10, 2021 at 06:09:52PM -0800, Ilya Lipnitskiy wrote:
> A recent change to MIPS ralink reset logic made it so mt7530 actually
> resets the switch on platforms such as mt7621 (where bit 2 is the reset
> line for the switch). That exposed an issue where the switch would not
> function prop
On Wed, Mar 10, 2021 at 06:09:52PM -0800, Ilya Lipnitskiy wrote:
> A recent change to MIPS ralink reset logic made it so mt7530 actually
> resets the switch on platforms such as mt7621 (where bit 2 is the reset
> line for the switch). That exposed an issue where the switch would not
> function prop
A recent change to MIPS ralink reset logic made it so mt7530 actually
resets the switch on platforms such as mt7621 (where bit 2 is the reset
line for the switch). That exposed an issue where the switch would not
function properly in TRGMII mode after a reset.
Reconfigure core clock in TRGMII mode
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