Re: [PATCH v1] x86/microcode: Handle negative microcode revisions

2018-10-20 Thread Andi Kleen
On Sat, Oct 20, 2018 at 03:42:05PM +0200, Thomas Gleixner wrote: > Andi, > > On Fri, 19 Oct 2018, Andi Kleen wrote: > > Change the comparison to unsigned. With that the loading works > > as expected. > > > > I assume that wants a fixes tag and needs to be backported to stable, > right? I think

Re: [PATCH v1] x86/microcode: Handle negative microcode revisions

2018-10-20 Thread Andi Kleen
On Sat, Oct 20, 2018 at 03:42:05PM +0200, Thomas Gleixner wrote: > Andi, > > On Fri, 19 Oct 2018, Andi Kleen wrote: > > Change the comparison to unsigned. With that the loading works > > as expected. > > > > I assume that wants a fixes tag and needs to be backported to stable, > right? I think

Re: [PATCH v1] x86/microcode: Handle negative microcode revisions

2018-10-20 Thread Thomas Gleixner
Andi, On Fri, 19 Oct 2018, Andi Kleen wrote: > Change the comparison to unsigned. With that the loading works > as expected. > I assume that wants a fixes tag and needs to be backported to stable, right? Thanks, tglx

Re: [PATCH v1] x86/microcode: Handle negative microcode revisions

2018-10-20 Thread Thomas Gleixner
Andi, On Fri, 19 Oct 2018, Andi Kleen wrote: > Change the comparison to unsigned. With that the loading works > as expected. > I assume that wants a fixes tag and needs to be backported to stable, right? Thanks, tglx

Re: [PATCH v1] x86/microcode: Handle negative microcode revisions

2018-10-20 Thread Borislav Petkov
On Fri, Oct 19, 2018 at 05:11:37PM -0700, Andi Kleen wrote: > From: Andi Kleen > > The Intel ucode revision space is unsigned. Inside Intel there are special s/ucode/microcode/g > microcodes that have the highest bit set, and they are considered to have s/microcodes/microcode revisions/g > a

Re: [PATCH v1] x86/microcode: Handle negative microcode revisions

2018-10-20 Thread Borislav Petkov
On Fri, Oct 19, 2018 at 05:11:37PM -0700, Andi Kleen wrote: > From: Andi Kleen > > The Intel ucode revision space is unsigned. Inside Intel there are special s/ucode/microcode/g > microcodes that have the highest bit set, and they are considered to have s/microcodes/microcode revisions/g > a

[PATCH v1] x86/microcode: Handle negative microcode revisions

2018-10-19 Thread Andi Kleen
From: Andi Kleen The Intel ucode revision space is unsigned. Inside Intel there are special microcodes that have the highest bit set, and they are considered to have a higher revision than any microcodes that don't have this bit set. The function comparing the microcodes in the Linux driver

[PATCH v1] x86/microcode: Handle negative microcode revisions

2018-10-19 Thread Andi Kleen
From: Andi Kleen The Intel ucode revision space is unsigned. Inside Intel there are special microcodes that have the highest bit set, and they are considered to have a higher revision than any microcodes that don't have this bit set. The function comparing the microcodes in the Linux driver