[PATCH v1 1/2] ARM: tegra: Switch CPU to PLLP before powergating on Tegra30

2018-08-30 Thread Dmitry Osipenko
PLLX is getting turned by the HW logic when CPU enters powergated state and there is no enough time for PLLX to re-lock on exiting the low-power state, this causes memory errors coming from misbehaving CPU and eventual hanging of the system. Signed-off-by: Dmitry Osipenko ---

[PATCH v1 1/2] ARM: tegra: Switch CPU to PLLP before powergating on Tegra30

2018-08-30 Thread Dmitry Osipenko
PLLX is getting turned by the HW logic when CPU enters powergated state and there is no enough time for PLLX to re-lock on exiting the low-power state, this causes memory errors coming from misbehaving CPU and eventual hanging of the system. Signed-off-by: Dmitry Osipenko ---