On Wed, 12 Apr 2017, Sathyanarayanan Kuppuswamy Natarajan wrote:
> Hi Lee,
>
> Thanks. Will remove the code segment in next version.
Please always reply inline. Top posting is frowned upon.
> On Wed, Apr 12, 2017 at 3:45 AM, Lee Jones wrote:
> > On Mon, 10 Apr 2017,
On Wed, 12 Apr 2017, Sathyanarayanan Kuppuswamy Natarajan wrote:
> Hi Lee,
>
> Thanks. Will remove the code segment in next version.
Please always reply inline. Top posting is frowned upon.
> On Wed, Apr 12, 2017 at 3:45 AM, Lee Jones wrote:
> > On Mon, 10 Apr 2017,
Hi Lee,
Thanks. Will remove the code segment in next version.
On Wed, Apr 12, 2017 at 3:45 AM, Lee Jones wrote:
> On Mon, 10 Apr 2017, sathyanarayanan.kuppusw...@linux.intel.com wrote:
>
>> From: Kuppuswamy Sathyanarayanan
>>
>>
Hi Lee,
Thanks. Will remove the code segment in next version.
On Wed, Apr 12, 2017 at 3:45 AM, Lee Jones wrote:
> On Mon, 10 Apr 2017, sathyanarayanan.kuppusw...@linux.intel.com wrote:
>
>> From: Kuppuswamy Sathyanarayanan
>>
>> TMU interrupts are registered as a separate interrupt chip, and
On Mon, 10 Apr 2017, sathyanarayanan.kuppusw...@linux.intel.com wrote:
> From: Kuppuswamy Sathyanarayanan
>
> TMU interrupts are registered as a separate interrupt chip, and
> hence it should start its interrupt index(BXTWC_TMU_IRQ) number
> from 0.
On Mon, 10 Apr 2017, sathyanarayanan.kuppusw...@linux.intel.com wrote:
> From: Kuppuswamy Sathyanarayanan
>
> TMU interrupts are registered as a separate interrupt chip, and
> hence it should start its interrupt index(BXTWC_TMU_IRQ) number
> from 0. But currently, BXTWC_TMU_IRQ is defined as
From: Kuppuswamy Sathyanarayanan
TMU interrupts are registered as a separate interrupt chip, and
hence it should start its interrupt index(BXTWC_TMU_IRQ) number
from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum
bxtwc_irqs_level2 and its
From: Kuppuswamy Sathyanarayanan
TMU interrupts are registered as a separate interrupt chip, and
hence it should start its interrupt index(BXTWC_TMU_IRQ) number
from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum
bxtwc_irqs_level2 and its index value is 11. Since this index
value is
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