Re: [PATCH v1 1/7] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index

2017-04-12 Thread Lee Jones
On Wed, 12 Apr 2017, Sathyanarayanan Kuppuswamy Natarajan wrote: > Hi Lee, > > Thanks. Will remove the code segment in next version. Please always reply inline. Top posting is frowned upon. > On Wed, Apr 12, 2017 at 3:45 AM, Lee Jones wrote: > > On Mon, 10 Apr 2017,

Re: [PATCH v1 1/7] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index

2017-04-12 Thread Lee Jones
On Wed, 12 Apr 2017, Sathyanarayanan Kuppuswamy Natarajan wrote: > Hi Lee, > > Thanks. Will remove the code segment in next version. Please always reply inline. Top posting is frowned upon. > On Wed, Apr 12, 2017 at 3:45 AM, Lee Jones wrote: > > On Mon, 10 Apr 2017,

Re: [PATCH v1 1/7] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index

2017-04-12 Thread Sathyanarayanan Kuppuswamy Natarajan
Hi Lee, Thanks. Will remove the code segment in next version. On Wed, Apr 12, 2017 at 3:45 AM, Lee Jones wrote: > On Mon, 10 Apr 2017, sathyanarayanan.kuppusw...@linux.intel.com wrote: > >> From: Kuppuswamy Sathyanarayanan >> >>

Re: [PATCH v1 1/7] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index

2017-04-12 Thread Sathyanarayanan Kuppuswamy Natarajan
Hi Lee, Thanks. Will remove the code segment in next version. On Wed, Apr 12, 2017 at 3:45 AM, Lee Jones wrote: > On Mon, 10 Apr 2017, sathyanarayanan.kuppusw...@linux.intel.com wrote: > >> From: Kuppuswamy Sathyanarayanan >> >> TMU interrupts are registered as a separate interrupt chip, and

Re: [PATCH v1 1/7] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index

2017-04-12 Thread Lee Jones
On Mon, 10 Apr 2017, sathyanarayanan.kuppusw...@linux.intel.com wrote: > From: Kuppuswamy Sathyanarayanan > > TMU interrupts are registered as a separate interrupt chip, and > hence it should start its interrupt index(BXTWC_TMU_IRQ) number > from 0.

Re: [PATCH v1 1/7] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index

2017-04-12 Thread Lee Jones
On Mon, 10 Apr 2017, sathyanarayanan.kuppusw...@linux.intel.com wrote: > From: Kuppuswamy Sathyanarayanan > > TMU interrupts are registered as a separate interrupt chip, and > hence it should start its interrupt index(BXTWC_TMU_IRQ) number > from 0. But currently, BXTWC_TMU_IRQ is defined as

[PATCH v1 1/7] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index

2017-04-10 Thread sathyanarayanan . kuppuswamy
From: Kuppuswamy Sathyanarayanan TMU interrupts are registered as a separate interrupt chip, and hence it should start its interrupt index(BXTWC_TMU_IRQ) number from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum bxtwc_irqs_level2 and its

[PATCH v1 1/7] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index

2017-04-10 Thread sathyanarayanan . kuppuswamy
From: Kuppuswamy Sathyanarayanan TMU interrupts are registered as a separate interrupt chip, and hence it should start its interrupt index(BXTWC_TMU_IRQ) number from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum bxtwc_irqs_level2 and its index value is 11. Since this index value is