Quoting chand...@codeaurora.org (2019-02-01 16:05:55)
> On 2018-10-29 11:43, Stephen Boyd wrote:
> > Quoting Taniya Das (2018-10-28 03:34:55)
> >> On 2018-10-19 16:04, Taniya Das wrote:
>
> >> >>
> >> >>> +static struct clk_branch disp_cc_mdss_dp_link_intf_clk = {
> >> >>> + .halt_reg = 0x20
Hello Stephen,
On 2018-10-29 11:43, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-28 03:34:55)
Hello Stephen,
On 2018-10-19 16:04, Taniya Das wrote:
> Hello Stephen,
>
/snip
>>> +static struct clk_rcg2 disp_cc_mdss_dp_crypto_clk_src = {
>>> + .cmd_rcgr = 0x2154,
>>> + .mnd_
On 2018-11-06 09:08, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-31 22:02:22)
+ Chandan from Display Port team,
On 10/30/2018 10:03 PM, Stephen Boyd wrote:
> Also, those
> numbers look like gigabits per second (Gbit/s) for the DP spec which
> isn't exactly the same as a clk frequency. What
Quoting Taniya Das (2018-10-31 22:02:22)
> + Chandan from Display Port team,
>
> On 10/30/2018 10:03 PM, Stephen Boyd wrote:
> > Also, those
> > numbers look like gigabits per second (Gbit/s) for the DP spec which
> > isn't exactly the same as a clk frequency. What frequency does the PLL
> > run a
+ Chandan from Display Port team,
On 10/30/2018 10:03 PM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-29 23:01:44)
On 10/30/2018 12:13 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-28 03:34:55)
On 2018-10-19 16:04, Taniya Das wrote:
On 10/10/2018 2:04 AM, Stephen Boyd wrote:
Quoti
Quoting Taniya Das (2018-10-29 23:01:44)
> On 10/30/2018 12:13 AM, Stephen Boyd wrote:
> > Quoting Taniya Das (2018-10-28 03:34:55)
> >> On 2018-10-19 16:04, Taniya Das wrote:
> >>> On 10/10/2018 2:04 AM, Stephen Boyd wrote:
> Quoting Taniya Das (2018-10-09 06:57:47)
> > diff --git a/drive
On 10/30/2018 12:13 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-28 03:34:55)
Hello Stephen,
On 2018-10-19 16:04, Taniya Das wrote:
Hello Stephen,
On 10/10/2018 2:04 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 06:57:47)
diff --git a/drivers/clk/qcom/dispcc-sdm845.c
b/dr
Quoting Taniya Das (2018-10-28 03:34:55)
> Hello Stephen,
>
> On 2018-10-19 16:04, Taniya Das wrote:
> > Hello Stephen,
> >
> > On 10/10/2018 2:04 AM, Stephen Boyd wrote:
> >> Quoting Taniya Das (2018-10-09 06:57:47)
> >>> diff --git a/drivers/clk/qcom/dispcc-sdm845.c
> >>> b/drivers/clk/qcom/di
Hello Stephen,
On 2018-10-19 16:04, Taniya Das wrote:
Hello Stephen,
On 10/10/2018 2:04 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 06:57:47)
diff --git a/drivers/clk/qcom/dispcc-sdm845.c
b/drivers/clk/qcom/dispcc-sdm845.c
index 0cc4909..6d3136a 100644
--- a/drivers/clk/qcom/dispc
Hello Stephen,
On 10/10/2018 2:04 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 06:57:47)
diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c
index 0cc4909..6d3136a 100644
--- a/drivers/clk/qcom/dispcc-sdm845.c
+++ b/drivers/clk/qcom/dispcc-sdm845.c
@@ -128
Quoting Taniya Das (2018-10-09 06:57:47)
> diff --git a/drivers/clk/qcom/dispcc-sdm845.c
> b/drivers/clk/qcom/dispcc-sdm845.c
> index 0cc4909..6d3136a 100644
> --- a/drivers/clk/qcom/dispcc-sdm845.c
> +++ b/drivers/clk/qcom/dispcc-sdm845.c
> @@ -128,6 +144,100 @@ enum {
> },
> };
>
> +st
SDM845 dispcc supports RCG and CBCRs for display port, so add support for
the same.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/dispcc-sdm845.c | 232 +
include/dt-bindings/clock/qcom,dispcc-sdm845.h | 11 ++
2 files changed, 243 insertions(+)
diff --gi
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