[PATCH v1 3/8] KVM/x86/vPMU: optimize intel vPMU

2018-11-01 Thread Wei Wang
Current vPMU relies on the host perf software stack to update the guest change of the perf counter MSRs. The whole process includes releasing the old perf event and re-creating a new one. This results in around 250ns overhead to update a perf counter control MSR. This can be avoided by having

[PATCH v1 3/8] KVM/x86/vPMU: optimize intel vPMU

2018-11-01 Thread Wei Wang
Current vPMU relies on the host perf software stack to update the guest change of the perf counter MSRs. The whole process includes releasing the old perf event and re-creating a new one. This results in around 250ns overhead to update a perf counter control MSR. This can be avoided by having