[PATCH v1 6/8] xen/arm: vgic: Optimize the way to store the target vCPU in the rank

Xen is currently directly storing the value of register GICD_ITARGETSR (for GICv2) and GICD_IROUTER (for GICv3) in the rank. This makes the emulation of the registers access very simple but makes the code to get the target vCPU for a given IRQ more complex. While the target vCPU of an IRQ is

[PATCH v1 6/8] xen/arm: vgic: Optimize the way to store the target vCPU in the rank

Xen is currently directly storing the value of register GICD_ITARGETSR (for GICv2) and GICD_IROUTER (for GICv3) in the rank. This makes the emulation of the registers access very simple but makes the code to get the target vCPU for a given IRQ more complex. While the target vCPU of an IRQ is