On 2/15/24 3:06 AM, Krzysztof Kozlowski wrote:
> On 13/02/2024 21:37, Tanmay Shah wrote:
> > Hello,
> >
> > Thanks for reviews please find my comments below.
> >
> > On 2/13/24 1:20 PM, Rob Herring wrote:
> >> On Tue, 13 Feb 2024 09:54:48 -0800, Tanmay Shah wrote:
> >>> From: Radhey Shyam
On 13/02/2024 21:37, Tanmay Shah wrote:
> Hello,
>
> Thanks for reviews please find my comments below.
>
> On 2/13/24 1:20 PM, Rob Herring wrote:
>> On Tue, 13 Feb 2024 09:54:48 -0800, Tanmay Shah wrote:
>>> From: Radhey Shyam Pandey
>>>
>>> Introduce bindings for TCM memory address space on
On Tue, Feb 13, 2024 at 02:37:49PM -0600, Tanmay Shah wrote:
> Hello,
>
> Thanks for reviews please find my comments below.
>
> On 2/13/24 1:20 PM, Rob Herring wrote:
> > On Tue, 13 Feb 2024 09:54:48 -0800, Tanmay Shah wrote:
> > > From: Radhey Shyam Pandey
> > >
> > > Introduce bindings for
Hello,
Thanks for reviews please find my comments below.
On 2/13/24 1:20 PM, Rob Herring wrote:
> On Tue, 13 Feb 2024 09:54:48 -0800, Tanmay Shah wrote:
> > From: Radhey Shyam Pandey
> >
> > Introduce bindings for TCM memory address space on AMD-xilinx Zynq
> > UltraScale+ platform. It will
On Tue, 13 Feb 2024 09:54:48 -0800, Tanmay Shah wrote:
> From: Radhey Shyam Pandey
>
> Introduce bindings for TCM memory address space on AMD-xilinx Zynq
> UltraScale+ platform. It will help in defining TCM in device-tree
> and make it's access platform agnostic and data-driven.
>
>
From: Radhey Shyam Pandey
Introduce bindings for TCM memory address space on AMD-xilinx Zynq
UltraScale+ platform. It will help in defining TCM in device-tree
and make it's access platform agnostic and data-driven.
Tightly-coupled memories(TCMs) are low-latency memory that provides
predictable
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