Re: [RESEND PATCH v10 2/6] clk: hisilicon: add CRG driver for hi3519 soc

2016-04-19 Thread Jiancheng Xue
Hi Stephen, On 2016/4/16 8:40, Stephen Boyd wrote: > On 03/31, Jiancheng Xue wrote: >> diff --git a/drivers/clk/hisilicon/clk-hi3519.c >> b/drivers/clk/hisilicon/clk-hi3519.c >> new file mode 100644 >> index 000..ee9df82 >> --- /dev/null >> +++ b/drivers/clk/hisilicon/clk-hi3519.c >> @@ -0,0

Re: [RESEND PATCH v10 2/6] clk: hisilicon: add CRG driver for hi3519 soc

2016-04-17 Thread Jiancheng Xue
Hi Stephen, On 2016/4/16 8:41, Stephen Boyd wrote: > On 04/15, Jiancheng Xue wrote: >> Hi, >> >> On 2016/3/31 16:10, Jiancheng Xue wrote: >>> From: Jiancheng Xue >>> >>> The CRG(Clock and Reset Generator) block provides clock >>> and reset signals for other modules in hi3519 soc. >>> >>>

Re: [RESEND PATCH v10 2/6] clk: hisilicon: add CRG driver for hi3519 soc

2016-04-15 Thread Stephen Boyd
On 04/15, Jiancheng Xue wrote: > Hi, > > On 2016/3/31 16:10, Jiancheng Xue wrote: > > From: Jiancheng Xue > > > > The CRG(Clock and Reset Generator) block provides clock > > and reset signals for other modules in hi3519 soc. > > > > Signed-off-by: Jiancheng Xue > > Acked-by: Rob Herring > > A

Re: [RESEND PATCH v10 2/6] clk: hisilicon: add CRG driver for hi3519 soc

2016-04-15 Thread Stephen Boyd
On 03/31, Jiancheng Xue wrote: > diff --git a/drivers/clk/hisilicon/clk-hi3519.c > b/drivers/clk/hisilicon/clk-hi3519.c > new file mode 100644 > index 000..ee9df82 > --- /dev/null > +++ b/drivers/clk/hisilicon/clk-hi3519.c > @@ -0,0 +1,129 @@ > +/* > + * Hi3519 Clock Driver > + * > + * Copyrig

Re: [RESEND PATCH v10 2/6] clk: hisilicon: add CRG driver for hi3519 soc

2016-04-14 Thread Jiancheng Xue
Hi, On 2016/3/31 16:10, Jiancheng Xue wrote: > From: Jiancheng Xue > > The CRG(Clock and Reset Generator) block provides clock > and reset signals for other modules in hi3519 soc. > > Signed-off-by: Jiancheng Xue > Acked-by: Rob Herring > Acked-by: Philipp Zabel > --- I hope this patchset ca

[RESEND PATCH v10 2/6] clk: hisilicon: add CRG driver for hi3519 soc

2016-03-31 Thread Jiancheng Xue
From: Jiancheng Xue The CRG(Clock and Reset Generator) block provides clock and reset signals for other modules in hi3519 soc. Signed-off-by: Jiancheng Xue Acked-by: Rob Herring Acked-by: Philipp Zabel --- .../devicetree/bindings/clock/hi3519-crg.txt | 46 drivers/clk/hisilic

Re: [PATCH v10 2/6] clk: hisilicon: add CRG driver for hi3519 soc

2016-03-25 Thread Jiancheng Xue
Hi Stephen, I haven't received any comments for two weeks. Can you help me to ack this patch? Thank you very much. Regards, Jiancheng On 2016/3/8 10:20, Jiancheng Xue wrote: > The CRG(Clock and Reset Generator) block provides clock > and reset signals for other modules in hi3519 soc. >

[PATCH v10 2/6] clk: hisilicon: add CRG driver for hi3519 soc

2016-03-07 Thread Jiancheng Xue
The CRG(Clock and Reset Generator) block provides clock and reset signals for other modules in hi3519 soc. Signed-off-by: Jiancheng Xue Acked-by: Rob Herring Acked-by: Philipp Zabel --- .../devicetree/bindings/clock/hi3519-crg.txt | 46 drivers/clk/hisilicon/Kconfig