Hi Stephen,
On 2016/4/16 8:40, Stephen Boyd wrote:
> On 03/31, Jiancheng Xue wrote:
>> diff --git a/drivers/clk/hisilicon/clk-hi3519.c
>> b/drivers/clk/hisilicon/clk-hi3519.c
>> new file mode 100644
>> index 000..ee9df82
>> --- /dev/null
>> +++ b/drivers/clk/hisilicon/clk-hi3519.c
>> @@ -0,0
Hi Stephen,
On 2016/4/16 8:41, Stephen Boyd wrote:
> On 04/15, Jiancheng Xue wrote:
>> Hi,
>>
>> On 2016/3/31 16:10, Jiancheng Xue wrote:
>>> From: Jiancheng Xue
>>>
>>> The CRG(Clock and Reset Generator) block provides clock
>>> and reset signals for other modules in hi3519 soc.
>>>
>>>
On 04/15, Jiancheng Xue wrote:
> Hi,
>
> On 2016/3/31 16:10, Jiancheng Xue wrote:
> > From: Jiancheng Xue
> >
> > The CRG(Clock and Reset Generator) block provides clock
> > and reset signals for other modules in hi3519 soc.
> >
> > Signed-off-by: Jiancheng Xue
> > Acked-by: Rob Herring
> > A
On 03/31, Jiancheng Xue wrote:
> diff --git a/drivers/clk/hisilicon/clk-hi3519.c
> b/drivers/clk/hisilicon/clk-hi3519.c
> new file mode 100644
> index 000..ee9df82
> --- /dev/null
> +++ b/drivers/clk/hisilicon/clk-hi3519.c
> @@ -0,0 +1,129 @@
> +/*
> + * Hi3519 Clock Driver
> + *
> + * Copyrig
Hi,
On 2016/3/31 16:10, Jiancheng Xue wrote:
> From: Jiancheng Xue
>
> The CRG(Clock and Reset Generator) block provides clock
> and reset signals for other modules in hi3519 soc.
>
> Signed-off-by: Jiancheng Xue
> Acked-by: Rob Herring
> Acked-by: Philipp Zabel
> ---
I hope this patchset ca
From: Jiancheng Xue
The CRG(Clock and Reset Generator) block provides clock
and reset signals for other modules in hi3519 soc.
Signed-off-by: Jiancheng Xue
Acked-by: Rob Herring
Acked-by: Philipp Zabel
---
.../devicetree/bindings/clock/hi3519-crg.txt | 46
drivers/clk/hisilic
Hi Stephen,
I haven't received any comments for two weeks. Can you help me to ack this
patch?
Thank you very much.
Regards,
Jiancheng
On 2016/3/8 10:20, Jiancheng Xue wrote:
> The CRG(Clock and Reset Generator) block provides clock
> and reset signals for other modules in hi3519 soc.
>
The CRG(Clock and Reset Generator) block provides clock
and reset signals for other modules in hi3519 soc.
Signed-off-by: Jiancheng Xue
Acked-by: Rob Herring
Acked-by: Philipp Zabel
---
.../devicetree/bindings/clock/hi3519-crg.txt | 46
drivers/clk/hisilicon/Kconfig
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