On Wed, Oct 28, 2015 at 11:18 AM, Josh Cartwright wrote:
> On Wed, Oct 28, 2015 at 08:37:51AM -0700, Moritz Fischer wrote:
>> On Wed, Oct 28, 2015 at 3:07 AM, Josh Cartwright wrote:
>> > On Tue, Oct 27, 2015 at 05:09:12PM -0500, at...@opensource.altera.com
>> > wrote:
>> >> From: Alan Tull
>> >
[..]
> I do not think it's a good fit for the socfpga, or for the lower level
> fpga drivers _in general_. Nor do I think that the FPGA Bridge
> framework, as written, is a good fit for fpgas in general.
Could you elaborate a bit more on why you feel that way? For all
configurations that I could
On Wed, 28 Oct 2015, Josh Cartwright wrote:
> On Wed, Oct 28, 2015 at 12:03:41PM -0500, atull wrote:
> > On Wed, 28 Oct 2015, Moritz Fischer wrote:
> >
> > > On Wed, Oct 28, 2015 at 9:18 AM, Josh Cartwright wrote:
> > > > On Wed, Oct 28, 2015 at 08:37:51AM -0700, Moritz Fischer wrote:
> > > >> O
On Wed, Oct 28, 2015 at 12:59:16PM -0500, Josh Cartwright wrote:
> On Wed, Oct 28, 2015 at 12:03:41PM -0500, atull wrote:
> > On Wed, 28 Oct 2015, Moritz Fischer wrote:
> >
> > > On Wed, Oct 28, 2015 at 9:18 AM, Josh Cartwright wrote:
> > > > On Wed, Oct 28, 2015 at 08:37:51AM -0700, Moritz Fisch
On Wed, Oct 28, 2015 at 12:03:41PM -0500, atull wrote:
> On Wed, 28 Oct 2015, Moritz Fischer wrote:
>
> > On Wed, Oct 28, 2015 at 9:18 AM, Josh Cartwright wrote:
> > > On Wed, Oct 28, 2015 at 08:37:51AM -0700, Moritz Fischer wrote:
> > >> On Wed, Oct 28, 2015 at 3:07 AM, Josh Cartwright wrote:
>
On Wed, 28 Oct 2015, atull wrote:
> On Wed, 28 Oct 2015, Moritz Fischer wrote:
>
> > On Wed, Oct 28, 2015 at 9:18 AM, Josh Cartwright wrote:
> > > On Wed, Oct 28, 2015 at 08:37:51AM -0700, Moritz Fischer wrote:
> > >> On Wed, Oct 28, 2015 at 3:07 AM, Josh Cartwright wrote:
> > >> > On Tue, Oct
On Wed, 28 Oct 2015, Moritz Fischer wrote:
> On Wed, Oct 28, 2015 at 9:18 AM, Josh Cartwright wrote:
> > On Wed, Oct 28, 2015 at 08:37:51AM -0700, Moritz Fischer wrote:
> >> On Wed, Oct 28, 2015 at 3:07 AM, Josh Cartwright wrote:
> >> > On Tue, Oct 27, 2015 at 05:09:12PM -0500, at...@opensource.
On Wed, Oct 28, 2015 at 9:18 AM, Josh Cartwright wrote:
> On Wed, Oct 28, 2015 at 08:37:51AM -0700, Moritz Fischer wrote:
>> On Wed, Oct 28, 2015 at 3:07 AM, Josh Cartwright wrote:
>> > On Tue, Oct 27, 2015 at 05:09:12PM -0500, at...@opensource.altera.com
>> > wrote:
>> >> From: Alan Tull
>> >>
On Wed, Oct 28, 2015 at 08:37:51AM -0700, Moritz Fischer wrote:
> On Wed, Oct 28, 2015 at 3:07 AM, Josh Cartwright wrote:
> > On Tue, Oct 27, 2015 at 05:09:12PM -0500, at...@opensource.altera.com wrote:
> >> From: Alan Tull
> >>
> >> The Simple FPGA bus uses the FPGA Manager Framework and the
> >
On Wed, 28 Oct 2015, Steffen Trumtrar wrote:
> > +static int simple_fpga_bus_probe(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct device_node *np = dev->of_node;
> > + struct simple_fpga_bus *priv;
> > + struct fpga_manager *mgr;
> > + int ret;
>
On Wed, Oct 28, 2015 at 3:07 AM, Josh Cartwright wrote:
> On Tue, Oct 27, 2015 at 05:09:12PM -0500, at...@opensource.altera.com wrote:
>> From: Alan Tull
>>
>> The Simple FPGA bus uses the FPGA Manager Framework and the
>> FPGA Bridge Framework to provide a manufactorer-agnostic
>> interface for
On Wed, 28 Oct 2015, Josh Cartwright wrote:
> On Tue, Oct 27, 2015 at 05:09:12PM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > The Simple FPGA bus uses the FPGA Manager Framework and the
> > FPGA Bridge Framework to provide a manufactorer-agnostic
> > interface for reprog
On Tue, Oct 27, 2015 at 05:09:12PM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> The Simple FPGA bus uses the FPGA Manager Framework and the
> FPGA Bridge Framework to provide a manufactorer-agnostic
> interface for reprogramming FPGAs that is Device Tree
> Overlays-based.
Do y
On Tue, Oct 27, 2015 at 05:09:12PM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> The Simple FPGA bus uses the FPGA Manager Framework and the
> FPGA Bridge Framework to provide a manufactorer-agnostic
> interface for reprogramming FPGAs that is Device Tree
> Overlays-based.
>
>
From: Alan Tull
The Simple FPGA bus uses the FPGA Manager Framework and the
FPGA Bridge Framework to provide a manufactorer-agnostic
interface for reprogramming FPGAs that is Device Tree
Overlays-based.
When a Device Tree Overlay containing a Simple FPGA Bus is
applied, the Simple FPGA Bus will
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