> > Does this even need to be configurable? What is the cost of turning it on?
> > How does having less pools affect the system? Does average latency go up?
> > When would i consider an underrun actually a good thing?
> >
> > Maybe it should just be hard coded on? Or we should try to detect when
>
> > > Or we have also found out, that pushing back on parameters like
> > > this, the developers goes back and looks at the code, and sometimes
> > > figures out a way to automatically do the right thing, removing the
> > > configuration knob, and just making it all simpler for the user to
> > >
> > Or we have also found out, that pushing back on parameters like this,
> > the developers goes back and looks at the code, and sometimes figures
> > out a way to automatically do the right thing, removing the
> > configuration knob, and just making it all simpler for the user to
> > use.
>
> I
Hi,
czw., 11 lut 2021 o 15:19 Andrew Lunn napisaĆ(a):
>
> On Thu, Feb 11, 2021 at 08:22:19AM +, Stefan Chulski wrote:
> >
> > >
> > > --
> > > From:
> > > Date: Wed, 10 Feb 2021 11:48:17 +0200
> > >
> > > >
> > > > +static i
On Thu, Feb 11, 2021 at 08:22:19AM +, Stefan Chulski wrote:
>
> >
> > --
> > From:
> > Date: Wed, 10 Feb 2021 11:48:17 +0200
> >
> > >
> > > +static int bm_underrun_protect = 1;
> > > +
> > > +module_param(bm_underrun_prote
>
> --
> From:
> Date: Wed, 10 Feb 2021 11:48:17 +0200
>
> >
> > +static int bm_underrun_protect = 1;
> > +
> > +module_param(bm_underrun_protect, int, 0444);
> > +MODULE_PARM_DESC(bm_underrun_protect, "Set BM underrun protect
From:
Date: Wed, 10 Feb 2021 11:48:17 +0200
>
> +static int bm_underrun_protect = 1;
> +
> +module_param(bm_underrun_protect, int, 0444);
> +MODULE_PARM_DESC(bm_underrun_protect, "Set BM underrun protect feature
> (0-1), def=1");
No new module parameters, please.
From: Stefan Chulski
The PP2v23 hardware supports a feature allowing to double the
size of BPPI by decreasing number of pools from 16 to 8.
Increasing of BPPI size protect BM drop from BPPI underrun.
Underrun could occurred due to stress on DDR and as result slow buffer
transition from BPPE to BP
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