Re: [PATCH v14 03/26] x86/fpu/xstate: Introduce CET MSR XSAVES supervisor states

2020-10-12 Thread Yu, Yu-cheng
On 10/12/2020 12:58 PM, Cyrill Gorcunov wrote: On Mon, Oct 12, 2020 at 08:38:27AM -0700, Yu-cheng Yu wrote: ... /* * x86-64 Task Priority Register, CR8 diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c index 038e19c0019e..705fd9b94e31 100644 ---

Re: [PATCH v14 03/26] x86/fpu/xstate: Introduce CET MSR XSAVES supervisor states

2020-10-12 Thread Cyrill Gorcunov
On Mon, Oct 12, 2020 at 08:38:27AM -0700, Yu-cheng Yu wrote: ... > /* > * x86-64 Task Priority Register, CR8 > diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c > index 038e19c0019e..705fd9b94e31 100644 > --- a/arch/x86/kernel/fpu/xstate.c > +++

[PATCH v14 03/26] x86/fpu/xstate: Introduce CET MSR XSAVES supervisor states

2020-10-12 Thread Yu-cheng Yu
Control-flow Enforcement Technology (CET) adds five MSRs. Introduce them and their XSAVES supervisor states: MSR_IA32_U_CET (user-mode CET settings), MSR_IA32_PL3_SSP (user-mode Shadow Stack pointer), MSR_IA32_PL0_SSP (kernel-mode Shadow Stack pointer), MSR_IA32_PL1_SSP

[PATCH v14 03/26] x86/fpu/xstate: Introduce CET MSR XSAVES supervisor states

2020-10-09 Thread Yu-cheng Yu
Control-flow Enforcement Technology (CET) adds five MSRs. Introduce them and their XSAVES supervisor states: MSR_IA32_U_CET (user-mode CET settings), MSR_IA32_PL3_SSP (user-mode Shadow Stack pointer), MSR_IA32_PL0_SSP (kernel-mode Shadow Stack pointer), MSR_IA32_PL1_SSP