Hi,
On Wed, Jan 27, 2016 at 9:24 PM, atull wrote:
>> I think I said this before, but you should not need simple-bus. Having
>> it is wrong if the bus requires some configuration before enumerating
>> the child nodes. The way you have it, the bridge driver could probe
>> before the FPGA manager o
On Mon, 25 Jan 2016, Rob Herring wrote:
> On Wed, Jan 20, 2016 at 01:24:22PM -0600, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > New bindings document for FPGA Area for reprogramming
> > FPGA's under Device Tree control
> >
> > Signed-off-by: Alan Tull
> > ---
> > v9: initia
On Wed, Jan 20, 2016 at 01:24:22PM -0600, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> New bindings document for FPGA Area for reprogramming
> FPGA's under Device Tree control
>
> Signed-off-by: Alan Tull
> ---
> v9: initial version added to this patchset
> v10: s/fpga/FPGA/g
>
Hi Alan,
On Thu, Jan 21, 2016 at 6:21 PM, atull wrote:
> target-path = "/amba/fpga_bus@0/devcfg@f8007000";
derp ... building in the driver helps ... all good on your side ;-)
Cheers,
Moritz
On Thu, 21 Jan 2016, Moritz Fischer wrote:
> Hi Alan,
>
> I tried getting a simple example to work with overlays, however so far
> I failed getting
> the child nodes to probe drivers, maybe you have an idea? The fpga
> image is loaded just fine.
>
> in dts:
>
>fpga_bus@0 {
>
Hi Alan,
I tried getting a simple example to work with overlays, however so far
I failed getting
the child nodes to probe drivers, maybe you have an idea? The fpga
image is loaded just fine.
in dts:
fpga_bus@0 {
compatible = "altr,fpga-bus", "simple-bus";
From: Alan Tull
New bindings document for FPGA Area for reprogramming
FPGA's under Device Tree control
Signed-off-by: Alan Tull
---
v9: initial version added to this patchset
v10: s/fpga/FPGA/g
replace DT overlay example with slightly more complicated example
move to staging/simple-f
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