Hi Eugeniy,
Ping ! Can you please follow up the ARC patch to use the driver for 4.15.
Thx,
-Vineet
On 10/09/2017 11:25 AM, Vineet Gupta wrote:
On 10/04/2017 03:09 AM, Philipp Zabel wrote:
Hi Vineet,
On Mon, 2017-09-18 at 18:51 +0200, Philipp Zabel wrote:
Will it be OK for you to apply the
Hi Eugeniy,
Ping ! Can you please follow up the ARC patch to use the driver for 4.15.
Thx,
-Vineet
On 10/09/2017 11:25 AM, Vineet Gupta wrote:
On 10/04/2017 03:09 AM, Philipp Zabel wrote:
Hi Vineet,
On Mon, 2017-09-18 at 18:51 +0200, Philipp Zabel wrote:
Will it be OK for you to apply the
On 10/04/2017 03:09 AM, Philipp Zabel wrote:
Hi Vineet,
On Mon, 2017-09-18 at 18:51 +0200, Philipp Zabel wrote:
Will it be OK for you to apply the corresponding DT update for
platform - that way
I don't have to keep track of when ur branch hits mainline etc.
The chances of any ensuing
On 10/04/2017 03:09 AM, Philipp Zabel wrote:
Hi Vineet,
On Mon, 2017-09-18 at 18:51 +0200, Philipp Zabel wrote:
Will it be OK for you to apply the corresponding DT update for
platform - that way
I don't have to keep track of when ur branch hits mainline etc.
The chances of any ensuing
Hi Philipp,
On 10/04/2017 03:09 AM, Philipp Zabel wrote:
Maybe it is better to do this the other way around? I can put this patch
on a stable reset/arc branch for you to merge before applying the reset
DT updates.
Have you come to a decision on this?
Just in case, I have removed the AXS10x
Hi Philipp,
On 10/04/2017 03:09 AM, Philipp Zabel wrote:
Maybe it is better to do this the other way around? I can put this patch
on a stable reset/arc branch for you to merge before applying the reset
DT updates.
Have you come to a decision on this?
Just in case, I have removed the AXS10x
Hi Vineet,
On Mon, 2017-09-18 at 18:51 +0200, Philipp Zabel wrote:
> > Will it be OK for you to apply the corresponding DT update for
> > platform - that way
> > I don't have to keep track of when ur branch hits mainline etc.
> >
> > The chances of any ensuing conflicts are pretty rare - and
Hi Vineet,
On Mon, 2017-09-18 at 18:51 +0200, Philipp Zabel wrote:
> > Will it be OK for you to apply the corresponding DT update for
> > platform - that way
> > I don't have to keep track of when ur branch hits mainline etc.
> >
> > The chances of any ensuing conflicts are pretty rare - and
Hi Vineet,
On Mon, 2017-09-18 at 09:14 -0700, Vineet Gupta wrote:
> Hi Philipp,
>
> On 09/18/2017 05:07 AM, Philipp Zabel wrote:
> > On Thu, 2017-09-14 at 17:28 +0300, Eugeniy Paltsev wrote:
> > > ARC AXS10x boards support custom IP-block which allows to control
> > > reset signals of selected
Hi Vineet,
On Mon, 2017-09-18 at 09:14 -0700, Vineet Gupta wrote:
> Hi Philipp,
>
> On 09/18/2017 05:07 AM, Philipp Zabel wrote:
> > On Thu, 2017-09-14 at 17:28 +0300, Eugeniy Paltsev wrote:
> > > ARC AXS10x boards support custom IP-block which allows to control
> > > reset signals of selected
Hi Philipp,
On 09/18/2017 05:07 AM, Philipp Zabel wrote:
On Thu, 2017-09-14 at 17:28 +0300, Eugeniy Paltsev wrote:
ARC AXS10x boards support custom IP-block which allows to control
reset signals of selected peripherals. For example DW GMAC, etc...
This block is controlled via memory-mapped
Hi Philipp,
On 09/18/2017 05:07 AM, Philipp Zabel wrote:
On Thu, 2017-09-14 at 17:28 +0300, Eugeniy Paltsev wrote:
ARC AXS10x boards support custom IP-block which allows to control
reset signals of selected peripherals. For example DW GMAC, etc...
This block is controlled via memory-mapped
On Thu, 2017-09-14 at 17:28 +0300, Eugeniy Paltsev wrote:
> ARC AXS10x boards support custom IP-block which allows to control
> reset signals of selected peripherals. For example DW GMAC, etc...
> This block is controlled via memory-mapped register (AKA CREG) which
> represents up-to 32 reset
On Thu, 2017-09-14 at 17:28 +0300, Eugeniy Paltsev wrote:
> ARC AXS10x boards support custom IP-block which allows to control
> reset signals of selected peripherals. For example DW GMAC, etc...
> This block is controlled via memory-mapped register (AKA CREG) which
> represents up-to 32 reset
ARC AXS10x boards support custom IP-block which allows to control
reset signals of selected peripherals. For example DW GMAC, etc...
This block is controlled via memory-mapped register (AKA CREG) which
represents up-to 32 reset lines. This regiter is self-clearing so we
don't need to deassert line
ARC AXS10x boards support custom IP-block which allows to control
reset signals of selected peripherals. For example DW GMAC, etc...
This block is controlled via memory-mapped register (AKA CREG) which
represents up-to 32 reset lines. This regiter is self-clearing so we
don't need to deassert line
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