Re: [PATCH v2] arm64: invalidate TLB just before turning MMU on

2019-01-10 Thread Bhupesh Sharma
Hi Qian, On Sat, Dec 15, 2018 at 7:24 AM Qian Cai wrote: > > On 12/14/18 2:23 AM, Ard Biesheuvel wrote: > > On Fri, 14 Dec 2018 at 05:08, Qian Cai wrote: > >> Also tried to move the local TLB flush part around a bit inside > >> __cpu_setup(), although it did complete kdump some times, it did tri

Re: [PATCH v2] arm64: invalidate TLB just before turning MMU on

2018-12-14 Thread Qian Cai
On 12/14/18 2:23 AM, Ard Biesheuvel wrote: > On Fri, 14 Dec 2018 at 05:08, Qian Cai wrote: >> Also tried to move the local TLB flush part around a bit inside >> __cpu_setup(), although it did complete kdump some times, it did trigger >> "Synchronous Exception" in EFI after a cold-reboot fairly oft

Re: [PATCH v2] arm64: invalidate TLB just before turning MMU on

2018-12-14 Thread Qian Cai
On 12/14/18 12:01 AM, Bhupesh Sharma wrote: > Not sure why I can't reproduce on my HPE Apollo machine, so a couple > of questions: > 1. How many CPUs do you enable in the kdump kernel - do you pass > 'nr_cpus=1' to the kdump kernel to limit the maximum number of cores > to 1 in the kdump kernel? Y

Re: [PATCH v2] arm64: invalidate TLB just before turning MMU on

2018-12-13 Thread Ard Biesheuvel
On Fri, 14 Dec 2018 at 05:08, Qian Cai wrote: > Also tried to move the local TLB flush part around a bit inside > __cpu_setup(), although it did complete kdump some times, it did trigger > "Synchronous Exception" in EFI after a cold-reboot fairly often that > seems no way to recover remotely witho

Re: [PATCH v2] arm64: invalidate TLB just before turning MMU on

2018-12-13 Thread Bhupesh Sharma
On Fri, Dec 14, 2018 at 9:39 AM Qian Cai wrote: > > On this HPE Apollo 70 arm64 server with 256 CPUs, triggering a crash > dump just hung. It has 4 threads on each core. Each 2-core share a same > L1 and L2 caches, so that is 8 CPUs shares those. All CPUs share a same > L3 cache. > > It turned out

[PATCH v2] arm64: invalidate TLB just before turning MMU on

2018-12-13 Thread Qian Cai
On this HPE Apollo 70 arm64 server with 256 CPUs, triggering a crash dump just hung. It has 4 threads on each core. Each 2-core share a same L1 and L2 caches, so that is 8 CPUs shares those. All CPUs share a same L3 cache. It turned out that this was due to the TLB contained stale entries (or unin