Re: [PATCH v2] i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX FIFO

2021-01-12 Thread Dmitry Osipenko
12.01.2021 19:57, Sowjanya Komatineni пишет: ... >> @@ -326,6 +326,8 @@ static void i2c_writel(struct tegra_i2c_dev >> *i2c_dev, u32 val, unsigned int reg) >>   /* read back register to make sure that register writes >> completed */ >>   if (reg != I2C_TX_FIFO) >>  

Re: [PATCH v2] i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX FIFO

2021-01-12 Thread Sowjanya Komatineni
On 1/11/21 9:56 PM, Dmitry Osipenko wrote: 12.01.2021 07:06, Sowjanya Komatineni пишет: VI I2C don't have DMA support and uses PIO mode all the time. Current driver uses writesl() to fill TX FIFO based on available empty slots and with this seeing strange silent hang during any I2C register

Re: [PATCH v2] i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX FIFO

2021-01-11 Thread Dmitry Osipenko
12.01.2021 07:06, Sowjanya Komatineni пишет: > VI I2C don't have DMA support and uses PIO mode all the time. > > Current driver uses writesl() to fill TX FIFO based on available > empty slots and with this seeing strange silent hang during any I2C > register access after filling TX FIFO with 8

[PATCH v2] i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX FIFO

2021-01-11 Thread Sowjanya Komatineni
VI I2C don't have DMA support and uses PIO mode all the time. Current driver uses writesl() to fill TX FIFO based on available empty slots and with this seeing strange silent hang during any I2C register access after filling TX FIFO with 8 words. Using writel() followed by i2c_readl() in a loop