On 06/04/2017 13:46, Guenter Roeck wrote:
> On 04/05/2017 04:41 AM, Paolo Bonzini wrote:
>> The ICH9 is listed as having TCO v2, and indeed the behavior in the
>> datasheet corresponds to v2 (for example the NO_REBOOT flag is
>> accessible via the 16KiB-aligned Root Complex Base Address).
>>
>>
On 06/04/2017 13:46, Guenter Roeck wrote:
> On 04/05/2017 04:41 AM, Paolo Bonzini wrote:
>> The ICH9 is listed as having TCO v2, and indeed the behavior in the
>> datasheet corresponds to v2 (for example the NO_REBOOT flag is
>> accessible via the 16KiB-aligned Root Complex Base Address).
>>
>>
On 04/05/2017 04:41 AM, Paolo Bonzini wrote:
The ICH9 is listed as having TCO v2, and indeed the behavior in the
datasheet corresponds to v2 (for example the NO_REBOOT flag is
accessible via the 16KiB-aligned Root Complex Base Address).
However, the TCO counts twice just like in v1; the
On 04/05/2017 04:41 AM, Paolo Bonzini wrote:
The ICH9 is listed as having TCO v2, and indeed the behavior in the
datasheet corresponds to v2 (for example the NO_REBOOT flag is
accessible via the 16KiB-aligned Root Complex Base Address).
However, the TCO counts twice just like in v1; the
The ICH9 is listed as having TCO v2, and indeed the behavior in the
datasheet corresponds to v2 (for example the NO_REBOOT flag is
accessible via the 16KiB-aligned Root Complex Base Address).
However, the TCO counts twice just like in v1; the documentation
of the SECOND_TO_STS bit says: "ICH9
The ICH9 is listed as having TCO v2, and indeed the behavior in the
datasheet corresponds to v2 (for example the NO_REBOOT flag is
accessible via the 16KiB-aligned Root Complex Base Address).
However, the TCO counts twice just like in v1; the documentation
of the SECOND_TO_STS bit says: "ICH9
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