Re: [PATCH v2] mmc: sdhci_am654: Clear HISPD_ENA in some lower speed modes

On Mon, 1 Apr 2019 at 14:58, Faiz Abbas wrote: > > According to the AM654x Data Manual[1], the setup timing in lower speed > modes can only be met if the controller uses a falling edge data launch. > > To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be > cleared in default speed,

Re: [PATCH v2] mmc: sdhci_am654: Clear HISPD_ENA in some lower speed modes

On 1/04/19 3:58 PM, Faiz Abbas wrote: > According to the AM654x Data Manual[1], the setup timing in lower speed > modes can only be met if the controller uses a falling edge data launch. > > To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be > cleared in default speed, SD high

[PATCH v2] mmc: sdhci_am654: Clear HISPD_ENA in some lower speed modes

According to the AM654x Data Manual[1], the setup timing in lower speed modes can only be met if the controller uses a falling edge data launch. To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be cleared in default speed, SD high speed, MMC high speed, SDR12 and SDR25 speed modes.