Re: [PATCH v2] x86/microcode: Handle negative microcode revisions

2018-10-25 Thread Andi Kleen
On Sat, Oct 20, 2018 at 07:41:36PM +0200, Borislav Petkov wrote: > Dropping stable. > > On Sat, Oct 20, 2018 at 07:41:58AM -0700, Andi Kleen wrote: > > From: Andi Kleen > > > > The Intel microcode revision space is unsigned. Inside Intel there are > > special > > microcodes that have the

Re: [PATCH v2] x86/microcode: Handle negative microcode revisions

2018-10-25 Thread Andi Kleen
On Sat, Oct 20, 2018 at 07:41:36PM +0200, Borislav Petkov wrote: > Dropping stable. > > On Sat, Oct 20, 2018 at 07:41:58AM -0700, Andi Kleen wrote: > > From: Andi Kleen > > > > The Intel microcode revision space is unsigned. Inside Intel there are > > special > > microcodes that have the

Re: [PATCH v2] x86/microcode: Handle negative microcode revisions

2018-10-20 Thread Borislav Petkov
Dropping stable. On Sat, Oct 20, 2018 at 07:41:58AM -0700, Andi Kleen wrote: > From: Andi Kleen > > The Intel microcode revision space is unsigned. Inside Intel there are special > microcodes that have the highest bit set, and they are considered to have > a higher revision than any microcodes

Re: [PATCH v2] x86/microcode: Handle negative microcode revisions

2018-10-20 Thread Borislav Petkov
Dropping stable. On Sat, Oct 20, 2018 at 07:41:58AM -0700, Andi Kleen wrote: > From: Andi Kleen > > The Intel microcode revision space is unsigned. Inside Intel there are special > microcodes that have the highest bit set, and they are considered to have > a higher revision than any microcodes

[PATCH v2] x86/microcode: Handle negative microcode revisions

2018-10-20 Thread Andi Kleen
From: Andi Kleen The Intel microcode revision space is unsigned. Inside Intel there are special microcodes that have the highest bit set, and they are considered to have a higher revision than any microcodes that don't have this bit set. The function comparing the microcode revision in the

[PATCH v2] x86/microcode: Handle negative microcode revisions

2018-10-20 Thread Andi Kleen
From: Andi Kleen The Intel microcode revision space is unsigned. Inside Intel there are special microcodes that have the highest bit set, and they are considered to have a higher revision than any microcodes that don't have this bit set. The function comparing the microcode revision in the