On 10/09/2014 03:59 PM, David Daney wrote:
Note: actual execute-protection depends from HW capability, of course.
This patch is required for MIPS32/64 R2 emulation on MIPS R6
architecture.
Without it 'ssh-keygen' crashes pretty fast on attempt to execute
instruction
in stack.
There is muc
On 10/09/2014 03:18 PM, Leonid Yegoshin wrote:
On 10/09/2014 02:42 PM, David Daney wrote:
On 10/09/2014 01:00 PM, Leonid Yegoshin wrote:
The following series implements an executable stack protection in MIPS.
It sets up a per-thread 'VDSO' page and appropriate TLB support.
Page is set write-pr
On Thu, Oct 09, 2014 at 03:18:56PM -0700, Leonid Yegoshin wrote:
> >The recent discussions on this subject, including many comments from
> >Imgtec e-mail addresses, brought to light the need to use an instruction
> >set emulator for newer MIPSr6 ISA processors.
>
> In Imgtec I am only one who work
On 10/09/2014 02:42 PM, David Daney wrote:
On 10/09/2014 01:00 PM, Leonid Yegoshin wrote:
The following series implements an executable stack protection in MIPS.
It sets up a per-thread 'VDSO' page and appropriate TLB support.
Page is set write-protected from user and is maintained via kernel V
On 10/09/2014 01:00 PM, Leonid Yegoshin wrote:
The following series implements an executable stack protection in MIPS.
It sets up a per-thread 'VDSO' page and appropriate TLB support.
Page is set write-protected from user and is maintained via kernel VA.
MIPS FPU emulation is shifted to new page
The following series implements an executable stack protection in MIPS.
It sets up a per-thread 'VDSO' page and appropriate TLB support.
Page is set write-protected from user and is maintained via kernel VA.
MIPS FPU emulation is shifted to new page and stack is relieved for
execute protection as
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