On Mon, Jun 29, 2020 at 04:28:31PM -0300, Fabio Estevam wrote:
> On Fri, Jun 19, 2020 at 9:48 AM Thomas Bogendoerfer
> wrote:
> >
> > On Wed, Jun 03, 2020 at 02:33:54AM +0800, 周琰杰 (Zhou Yanjie) wrote:
> > > Document the available properties for the SoC root node and the
> > > CPU nodes of the devi
On Fri, Jun 19, 2020 at 9:48 AM Thomas Bogendoerfer
wrote:
>
> On Wed, Jun 03, 2020 at 02:33:54AM +0800, 周琰杰 (Zhou Yanjie) wrote:
> > Document the available properties for the SoC root node and the
> > CPU nodes of the devicetree for the Ingenic XBurst SoCs.
> >
> > Tested-by: H. Nikolaus Schaller
On Wed, Jun 03, 2020 at 02:33:54AM +0800, 周琰杰 (Zhou Yanjie) wrote:
> Document the available properties for the SoC root node and the
> CPU nodes of the devicetree for the Ingenic XBurst SoCs.
>
> Tested-by: H. Nikolaus Schaller
> Tested-by: Paul Boddie
> Signed-off-by: 周琰杰 (Zhou Yanjie)
> ---
>
On Wed, 03 Jun 2020 02:33:54 +0800, 周琰杰 (Zhou Yanjie) wrote:
> Document the available properties for the SoC root node and the
> CPU nodes of the devicetree for the Ingenic XBurst SoCs.
>
> Tested-by: H. Nikolaus Schaller
> Tested-by: Paul Boddie
> Signed-off-by: 周琰杰 (Zhou Yanjie)
> ---
>
> No
Document the available properties for the SoC root node and the
CPU nodes of the devicetree for the Ingenic XBurst SoCs.
Tested-by: H. Nikolaus Schaller
Tested-by: Paul Boddie
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v1->v2:
1.Remove unnecessary "items".
2.Add "clocks" as sugges
5 matches
Mail list logo