On Thu, Jun 09, 2016 at 10:46:49AM -0400, Damien Riegel wrote:
> Enable FPGA's IRQ controller. It is in charge of dispatching interrupts
> generated by IPs in the FPGA. The SoC is notified that an interrupt
> occurred through a GPIO.
>
> Signed-off-by: Damien Riegel
On Thu, Jun 09, 2016 at 10:46:49AM -0400, Damien Riegel wrote:
> Enable FPGA's IRQ controller. It is in charge of dispatching interrupts
> generated by IPs in the FPGA. The SoC is notified that an interrupt
> occurred through a GPIO.
>
> Signed-off-by: Damien Riegel
Applied both, thanks.
Enable FPGA's IRQ controller. It is in charge of dispatching interrupts
generated by IPs in the FPGA. The SoC is notified that an interrupt
occurred through a GPIO.
Signed-off-by: Damien Riegel
---
Changes in v2:
- Remove new lines
- Use hyphen rather than
Enable FPGA's IRQ controller. It is in charge of dispatching interrupts
generated by IPs in the FPGA. The SoC is notified that an interrupt
occurred through a GPIO.
Signed-off-by: Damien Riegel
---
Changes in v2:
- Remove new lines
- Use hyphen rather than underscore in node name
- Get rid of
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