On 02/04/21 10:53, Xiaoyao Li wrote:
Hi Paolo,
Fenghua's bare metal support is in tip tree now.
https://lore.kernel.org/lkml/20210322135325.682257-1-fenghua...@intel.com/
Will the rest KVM patches get into 5.13 together?
Yes, they will.
Thanks for the notice!
Paolo
On 2/3/2021 12:05 AM, Paolo Bonzini wrote:
On 02/02/21 16:02, Xiaoyao Li wrote:
On 2/2/2021 10:49 PM, Paolo Bonzini wrote:
On 02/02/21 10:04, Chenyi Qiang wrote:
#define DR6_FIXED_1 0xfffe0ff0
-#define DR6_INIT 0x0ff0
+/*
+ * DR6_ACTIVE_LOW is actual the result of DR6_FIXED_1 |
On 02/02/21 16:02, Xiaoyao Li wrote:
On 2/2/2021 10:49 PM, Paolo Bonzini wrote:
On 02/02/21 10:04, Chenyi Qiang wrote:
#define DR6_FIXED_1 0xfffe0ff0
-#define DR6_INIT 0x0ff0
+/*
+ * DR6_ACTIVE_LOW is actual the result of DR6_FIXED_1 |
ACTIVE_LOW_BITS.
+ * We can regard all the
On 2/2/2021 10:49 PM, Paolo Bonzini wrote:
On 02/02/21 10:04, Chenyi Qiang wrote:
#define DR6_FIXED_1 0xfffe0ff0
-#define DR6_INIT 0x0ff0
+/*
+ * DR6_ACTIVE_LOW is actual the result of DR6_FIXED_1 | ACTIVE_LOW_BITS.
+ * We can regard all the current FIXED_1 bits as active_low bits
On 02/02/21 10:04, Chenyi Qiang wrote:
#define DR6_FIXED_10xfffe0ff0
-#define DR6_INIT 0x0ff0
+/*
+ * DR6_ACTIVE_LOW is actual the result of DR6_FIXED_1 | ACTIVE_LOW_BITS.
+ * We can regard all the current FIXED_1 bits as active_low bits even
+ * though in no case they will be
DR6_INIT contains the 1-reserved bits as well as the bit that is cleared
to 0 when the condition (e.g. RTM) happens. The value can be used to
initialize dr6 and also be the XOR mask between the #DB exit
qualification (or payload) and DR6.
Concerning that DR6_INIT is used as initial value only
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