Hi Paolo,
On 08/04/2017 09:05 AM, Paolo Bonzini wrote:
On 04/08/2017 02:30, Brijesh Singh wrote:
On 8/2/17 5:42 AM, Paolo Bonzini wrote:
On 01/08/2017 15:36, Brijesh Singh wrote:
The flow is:
hardware walks page table; L2 page table points to read only memory
-> pf_interception
Hi Paolo,
On 08/04/2017 09:05 AM, Paolo Bonzini wrote:
On 04/08/2017 02:30, Brijesh Singh wrote:
On 8/2/17 5:42 AM, Paolo Bonzini wrote:
On 01/08/2017 15:36, Brijesh Singh wrote:
The flow is:
hardware walks page table; L2 page table points to read only memory
-> pf_interception
On 04/08/2017 02:30, Brijesh Singh wrote:
>
>
> On 8/2/17 5:42 AM, Paolo Bonzini wrote:
>> On 01/08/2017 15:36, Brijesh Singh wrote:
The flow is:
hardware walks page table; L2 page table points to read only memory
-> pf_interception (code =
->
On 04/08/2017 02:30, Brijesh Singh wrote:
>
>
> On 8/2/17 5:42 AM, Paolo Bonzini wrote:
>> On 01/08/2017 15:36, Brijesh Singh wrote:
The flow is:
hardware walks page table; L2 page table points to read only memory
-> pf_interception (code =
->
On 8/2/17 5:42 AM, Paolo Bonzini wrote:
> On 01/08/2017 15:36, Brijesh Singh wrote:
>>> The flow is:
>>>
>>>hardware walks page table; L2 page table points to read only memory
>>>-> pf_interception (code =
>>>-> kvm_handle_page_fault (need_unprotect = false)
>>>->
On 8/2/17 5:42 AM, Paolo Bonzini wrote:
> On 01/08/2017 15:36, Brijesh Singh wrote:
>>> The flow is:
>>>
>>>hardware walks page table; L2 page table points to read only memory
>>>-> pf_interception (code =
>>>-> kvm_handle_page_fault (need_unprotect = false)
>>>->
On 01/08/2017 15:36, Brijesh Singh wrote:
>>
>> The flow is:
>>
>>hardware walks page table; L2 page table points to read only memory
>>-> pf_interception (code =
>>-> kvm_handle_page_fault (need_unprotect = false)
>>-> kvm_mmu_page_fault
>>-> paging64_page_fault (for example)
On 01/08/2017 15:36, Brijesh Singh wrote:
>>
>> The flow is:
>>
>>hardware walks page table; L2 page table points to read only memory
>>-> pf_interception (code =
>>-> kvm_handle_page_fault (need_unprotect = false)
>>-> kvm_mmu_page_fault
>>-> paging64_page_fault (for example)
On 07/31/2017 03:05 PM, Paolo Bonzini wrote:
There can be different cases where an L0->L2 shadow nested page table is
marked read only, in particular when a page is read only in L1's nested
page tables. If such a page is accessed by L2 while walking page tables
it will cause a nested page
On 07/31/2017 03:05 PM, Paolo Bonzini wrote:
There can be different cases where an L0->L2 shadow nested page table is
marked read only, in particular when a page is read only in L1's nested
page tables. If such a page is accessed by L2 while walking page tables
it will cause a nested page
> > There can be different cases where an L0->L2 shadow nested page table is
> > marked read only, in particular when a page is read only in L1's nested
> > page tables. If such a page is accessed by L2 while walking page tables
> > it will cause a nested page fault (page table walks are write
> > There can be different cases where an L0->L2 shadow nested page table is
> > marked read only, in particular when a page is read only in L1's nested
> > page tables. If such a page is accessed by L2 while walking page tables
> > it will cause a nested page fault (page table walks are write
On 07/31/2017 10:44 AM, Paolo Bonzini wrote:
On 31/07/2017 15:30, Brijesh Singh wrote:
Hi Paolo,
On 07/27/2017 11:27 AM, Paolo Bonzini wrote:
On 23/11/2016 18:01, Brijesh Singh wrote:
+/*
+ * Before emulating the instruction, check if the error code
+ * was due to a RO
On 07/31/2017 10:44 AM, Paolo Bonzini wrote:
On 31/07/2017 15:30, Brijesh Singh wrote:
Hi Paolo,
On 07/27/2017 11:27 AM, Paolo Bonzini wrote:
On 23/11/2016 18:01, Brijesh Singh wrote:
+/*
+ * Before emulating the instruction, check if the error code
+ * was due to a RO
On 31/07/2017 15:30, Brijesh Singh wrote:
> Hi Paolo,
>
> On 07/27/2017 11:27 AM, Paolo Bonzini wrote:
>> On 23/11/2016 18:01, Brijesh Singh wrote:
>>> +/*
>>> + * Before emulating the instruction, check if the error code
>>> + * was due to a RO violation while translating the guest
On 31/07/2017 15:30, Brijesh Singh wrote:
> Hi Paolo,
>
> On 07/27/2017 11:27 AM, Paolo Bonzini wrote:
>> On 23/11/2016 18:01, Brijesh Singh wrote:
>>> +/*
>>> + * Before emulating the instruction, check if the error code
>>> + * was due to a RO violation while translating the guest
Hi Paolo,
On 07/27/2017 11:27 AM, Paolo Bonzini wrote:
On 23/11/2016 18:01, Brijesh Singh wrote:
+ /*
+* Before emulating the instruction, check if the error code
+* was due to a RO violation while translating the guest page.
+* This can occur when using nested
Hi Paolo,
On 07/27/2017 11:27 AM, Paolo Bonzini wrote:
On 23/11/2016 18:01, Brijesh Singh wrote:
+ /*
+* Before emulating the instruction, check if the error code
+* was due to a RO violation while translating the guest page.
+* This can occur when using nested
On 23/11/2016 18:01, Brijesh Singh wrote:
>
> + /*
> + * Before emulating the instruction, check if the error code
> + * was due to a RO violation while translating the guest page.
> + * This can occur when using nested virtualization with nested
> + * paging in both
On 23/11/2016 18:01, Brijesh Singh wrote:
>
> + /*
> + * Before emulating the instruction, check if the error code
> + * was due to a RO violation while translating the guest page.
> + * This can occur when using nested virtualization with nested
> + * paging in both
From: Tom Lendacky
AMD hardware adds two additional bits to aid in nested page fault handling.
Bit 32 - NPF occurred while translating the guest's final physical address
Bit 33 - NPF occurred while translating the guest page tables
The guest page tables fault indicator
From: Tom Lendacky
AMD hardware adds two additional bits to aid in nested page fault handling.
Bit 32 - NPF occurred while translating the guest's final physical address
Bit 33 - NPF occurred while translating the guest page tables
The guest page tables fault indicator can be used as an aid
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