On Fri, Sep 5, 2014 at 12:05 PM, Thomas Gleixner wrote:
> On Fri, 5 Sep 2014, Andrew Bresticker wrote:
>> static void gic_mask_irq(struct irq_data *d)
>> {
>> - GIC_CLR_INTR_MASK(d->irq - gic_irq_base);
>> + unsigned int irq = d->irq - gic_irq_base;
>> +
>> + if
On Fri, 5 Sep 2014, Andrew Bresticker wrote:
> static void gic_mask_irq(struct irq_data *d)
> {
> - GIC_CLR_INTR_MASK(d->irq - gic_irq_base);
> + unsigned int irq = d->irq - gic_irq_base;
> +
> + if (gic_is_local_irq(irq)) {
> + GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_RMASK),
The MIPS GIC supports 7 local interrupts, 5 of which are just core
interrupts which can be re-routed through the GIC. This patch adds
support for mapping and handling the remaining two: the GIC timer
and watchdog. GIC interrupts from 0 to GIC_NUM_INTRS are still the
shared external interrupts
The MIPS GIC supports 7 local interrupts, 5 of which are just core
interrupts which can be re-routed through the GIC. This patch adds
support for mapping and handling the remaining two: the GIC timer
and watchdog. GIC interrupts from 0 to GIC_NUM_INTRS are still the
shared external interrupts
On Fri, 5 Sep 2014, Andrew Bresticker wrote:
static void gic_mask_irq(struct irq_data *d)
{
- GIC_CLR_INTR_MASK(d-irq - gic_irq_base);
+ unsigned int irq = d-irq - gic_irq_base;
+
+ if (gic_is_local_irq(irq)) {
+ GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_RMASK),
+
On Fri, Sep 5, 2014 at 12:05 PM, Thomas Gleixner t...@linutronix.de wrote:
On Fri, 5 Sep 2014, Andrew Bresticker wrote:
static void gic_mask_irq(struct irq_data *d)
{
- GIC_CLR_INTR_MASK(d-irq - gic_irq_base);
+ unsigned int irq = d-irq - gic_irq_base;
+
+ if
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