> As all NVMe devices make use of this standard interface and the NVMe
> specification also requires PCIe FLR support, we can apply this quirk
> to all devices with matching class code.
But not all NVMe devices require this quirk. So please only quirk
devices that actually require it.
> As all NVMe devices make use of this standard interface and the NVMe
> specification also requires PCIe FLR support, we can apply this quirk
> to all devices with matching class code.
But not all NVMe devices require this quirk. So please only quirk
devices that actually require it.
On Mon, 23 Jul 2018 19:20:41 -0700
Sinan Kaya wrote:
> On 7/23/18, Alex Williamson wrote:
> > On Mon, 23 Jul 2018 17:40:02 -0700
> > Sinan Kaya wrote:
> >
> >> On 7/23/2018 5:13 PM, Alex Williamson wrote:
> >> > + * The NVMe specification requires that controllers support PCIe FLR,
> >> >
On Mon, 23 Jul 2018 19:20:41 -0700
Sinan Kaya wrote:
> On 7/23/18, Alex Williamson wrote:
> > On Mon, 23 Jul 2018 17:40:02 -0700
> > Sinan Kaya wrote:
> >
> >> On 7/23/2018 5:13 PM, Alex Williamson wrote:
> >> > + * The NVMe specification requires that controllers support PCIe FLR,
> >> >
On 7/23/18, Alex Williamson wrote:
> On Mon, 23 Jul 2018 17:40:02 -0700
> Sinan Kaya wrote:
>
>> On 7/23/2018 5:13 PM, Alex Williamson wrote:
>> > + * The NVMe specification requires that controllers support PCIe FLR,
>> > but
>> > + * but some Samsung SM961/PM961 controllers fail to recover
On 7/23/18, Alex Williamson wrote:
> On Mon, 23 Jul 2018 17:40:02 -0700
> Sinan Kaya wrote:
>
>> On 7/23/2018 5:13 PM, Alex Williamson wrote:
>> > + * The NVMe specification requires that controllers support PCIe FLR,
>> > but
>> > + * but some Samsung SM961/PM961 controllers fail to recover
On Mon, 23 Jul 2018 17:40:02 -0700
Sinan Kaya wrote:
> On 7/23/2018 5:13 PM, Alex Williamson wrote:
> > + * The NVMe specification requires that controllers support PCIe FLR, but
> > + * but some Samsung SM961/PM961 controllers fail to recover after FLR (-1
> > + * config space) unless the
On Mon, 23 Jul 2018 17:40:02 -0700
Sinan Kaya wrote:
> On 7/23/2018 5:13 PM, Alex Williamson wrote:
> > + * The NVMe specification requires that controllers support PCIe FLR, but
> > + * but some Samsung SM961/PM961 controllers fail to recover after FLR (-1
> > + * config space) unless the
On 7/23/2018 5:13 PM, Alex Williamson wrote:
+ * The NVMe specification requires that controllers support PCIe FLR, but
+ * but some Samsung SM961/PM961 controllers fail to recover after FLR (-1
+ * config space) unless the device is quiesced prior to FLR.
Does disabling the memory bit in PCI
On 7/23/2018 5:13 PM, Alex Williamson wrote:
+ * The NVMe specification requires that controllers support PCIe FLR, but
+ * but some Samsung SM961/PM961 controllers fail to recover after FLR (-1
+ * config space) unless the device is quiesced prior to FLR.
Does disabling the memory bit in PCI
Take advantage of NVMe devices using a standard interface to quiesce
the controller prior to reset, including device specific delays before
and after that reset. This resolves several NVMe device assignment
scenarios with two different vendors. The Intel DC P3700 controller
has been shown to
Take advantage of NVMe devices using a standard interface to quiesce
the controller prior to reset, including device specific delays before
and after that reset. This resolves several NVMe device assignment
scenarios with two different vendors. The Intel DC P3700 controller
has been shown to
12 matches
Mail list logo