Re: [PATCH v2 2/2] dt: Add bindings for IDT VersaClock 5P49V5925

2017-07-10 Thread Rob Herring
On Sun, Jul 09, 2017 at 08:40:05PM +0300, Vladimir Barinov wrote: > From: Vladimir Barinov > > IDT VersaClock 5 5P49V5925 has 5 clock outputs, 4 fractional dividers. > Input clock source can be taken only from external reference clock. > > Signed-off-by: Vladimir Barinov > --- > Changes in vers

Re: [PATCH v2 2/2] dt: Add bindings for IDT VersaClock 5P49V5925

2017-07-09 Thread Marek Vasut
On 07/09/2017 07:40 PM, Vladimir Barinov wrote: > From: Vladimir Barinov > > IDT VersaClock 5 5P49V5925 has 5 clock outputs, 4 fractional dividers. > Input clock source can be taken only from external reference clock. > > Signed-off-by: Vladimir Barinov Reviewed-by: Marek Vasut > --- > Chang

[PATCH v2 2/2] dt: Add bindings for IDT VersaClock 5P49V5925

2017-07-09 Thread Vladimir Barinov
From: Vladimir Barinov IDT VersaClock 5 5P49V5925 has 5 clock outputs, 4 fractional dividers. Input clock source can be taken only from external reference clock. Signed-off-by: Vladimir Barinov --- Changes in version 2: - fixed typo in patch header: VC5 has 5 clock outputs - rebased against pat