Re: [PATCH v2 2/2] gpio: aspeed: Add banks Y, Z, AA, AB and AC

2017-01-26 Thread Andrew Jeffery
On Thu, 2017-01-26 at 14:51 +0100, Linus Walleij wrote: > > On Tue, Jan 24, 2017 at 7:16 AM, Andrew Jeffery wrote: > > > This is less straight-forward than one would hope, as some banks only > > have 4 pins rather than 8, others are output only, yet more (W and > > X, already supported) are input

Re: [PATCH v2 2/2] gpio: aspeed: Add banks Y, Z, AA, AB and AC

2017-01-26 Thread Linus Walleij
On Tue, Jan 24, 2017 at 7:16 AM, Andrew Jeffery wrote: > This is less straight-forward than one would hope, as some banks only > have 4 pins rather than 8, others are output only, yet more (W and > X, already supported) are input-only, and in the case of the g4 SoC bank > AC doesn't exist. > > Ad

[PATCH v2 2/2] gpio: aspeed: Add banks Y, Z, AA, AB and AC

2017-01-23 Thread Andrew Jeffery
This is less straight-forward than one would hope, as some banks only have 4 pins rather than 8, others are output only, yet more (W and X, already supported) are input-only, and in the case of the g4 SoC bank AC doesn't exist. Add some structs to describe the varying properties of different banks