Re: [PATCH v2 2/2] i2c: i2c-ocores: Add support for the GRLIB port of the controller and custom getreg and setreg functions

2012-11-13 Thread Wolfram Sang
Hi, On Mon, Nov 12, 2012 at 05:59:51PM +0100, Andreas Larsson wrote: > @@ -233,6 +276,7 @@ static int ocores_i2c_of_probe(struct platform_device > *pdev, > { > struct device_node *np = pdev->dev.of_node; > u32 val; > + const char *name; > > if (of_property_read_u32(np,

Re: [PATCH v2 2/2] i2c: i2c-ocores: Add support for the GRLIB port of the controller and custom getreg and setreg functions

2012-11-13 Thread Wolfram Sang
Hi, On Mon, Nov 12, 2012 at 05:59:51PM +0100, Andreas Larsson wrote: @@ -233,6 +276,7 @@ static int ocores_i2c_of_probe(struct platform_device *pdev, { struct device_node *np = pdev-dev.of_node; u32 val; + const char *name; if (of_property_read_u32(np,

[PATCH v2 2/2] i2c: i2c-ocores: Add support for the GRLIB port of the controller and custom getreg and setreg functions

2012-11-12 Thread Andreas Larsson
The registers in the GRLIB port of the controller are 32-bit and in big endian byte order. The PRELOW and PREHIGH registers are merged into one register. The subsequent registers have their offset decreased accordingly. Hence the register access needs to be handled in a non-standard manner using

[PATCH v2 2/2] i2c: i2c-ocores: Add support for the GRLIB port of the controller and custom getreg and setreg functions

2012-11-12 Thread Andreas Larsson
The registers in the GRLIB port of the controller are 32-bit and in big endian byte order. The PRELOW and PREHIGH registers are merged into one register. The subsequent registers have their offset decreased accordingly. Hence the register access needs to be handled in a non-standard manner using