On 22/03/17 09:47, Joel Stanley wrote:
> On Wed, Mar 22, 2017 at 7:18 AM, Rick Altherr wrote:
>> Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. Low
>> and high threshold interrupts are supported by the hardware but are not
>> currently implemented.
>>
>> Signed-off-by: Rick Alth
On 22/03/17 10:08, Joel Stanley wrote:
> Hello Quentin,
>
> On Wed, Mar 22, 2017 at 5:51 PM, Quentin Schulz
> wrote:
>
>>> +
>>> +#define ASPEED_ADC_CHAN(_idx, _addr) { \
>>> + .type = IIO_VOLTAGE,\
>>> + .indexed = 1,
On Thu, Mar 23, 2017 at 12:52 AM, Quentin Schulz
wrote:
> Hi,
>
> On 22/03/2017 21:46, Rick Altherr wrote:
>> On Wed, Mar 22, 2017 at 12:21 AM, Quentin Schulz
>> wrote:
>>> Hi,
>>>
>>> On 21/03/2017 21:48, Rick Altherr wrote:
Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC.
Restoring the list after an accidental direct reply.
On Wed, Mar 22, 2017 at 2:32 PM, Rick Altherr wrote:
> On Wed, Mar 22, 2017 at 2:47 AM, Joel Stanley wrote:
>> On Wed, Mar 22, 2017 at 7:18 AM, Rick Altherr wrote:
>>> Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. Low
>>>
Restoring the list after an accidental direct reply.
On Wed, Mar 22, 2017 at 1:30 PM, Rick Altherr wrote:
> On Tue, Mar 21, 2017 at 2:14 PM, Peter Meerwald-Stadler
> wrote:
>>
>>> Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. Low
>>> and high threshold interrupts are supporte
Hi Rick,
[auto build test ERROR on iio/togreg]
[also build test ERROR on v4.11-rc3 next-20170322]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Rick-Altherr/Documentation-dt-bindings-Document-b
Hi,
On 22/03/2017 21:46, Rick Altherr wrote:
> On Wed, Mar 22, 2017 at 12:21 AM, Quentin Schulz
> wrote:
>> Hi,
>>
>> On 21/03/2017 21:48, Rick Altherr wrote:
>>> Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. Low
>>> and high threshold interrupts are supported by the hardware
Hi Rick,
[auto build test ERROR on iio/togreg]
[also build test ERROR on v4.11-rc3 next-20170322]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Rick-Altherr/Documentation-dt-bindings-Document-b
Hello Quentin,
On Wed, Mar 22, 2017 at 5:51 PM, Quentin Schulz
wrote:
>> +
>> +#define ASPEED_ADC_CHAN(_idx, _addr) { \
>> + .type = IIO_VOLTAGE,\
>> + .indexed = 1, \
>> + .ch
On Wed, Mar 22, 2017 at 7:18 AM, Rick Altherr wrote:
> Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. Low
> and high threshold interrupts are supported by the hardware but are not
> currently implemented.
>
> Signed-off-by: Rick Altherr
Looks good Rick. I gave it a review from
Hi,
On 21/03/2017 21:48, Rick Altherr wrote:
> Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. Low
> and high threshold interrupts are supported by the hardware but are not
> currently implemented.
>
> Signed-off-by: Rick Altherr
> ---
>
> Changes in v2:
> - Rewritten as an II
> Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. Low
> and high threshold interrupts are supported by the hardware but are not
> currently implemented.
comments below
link to a datasheet would be nice
> Signed-off-by: Rick Altherr
> ---
>
> Changes in v2:
> - Rewritten as a
Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. Low
and high threshold interrupts are supported by the hardware but are not
currently implemented.
Signed-off-by: Rick Altherr
---
Changes in v2:
- Rewritten as an IIO device
- Renamed register macros to describe the register's pu
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