Re: [PATCH v2 2/2] misc: Add Xilinx ZYNQMP VCU logicoreIP init driver

Dear Dhaval, On Thu, Dec 7, 2017 at 10:31 PM, Dhaval Shah wrote: > Xilinx ZYNQMP logicoreIP Init driver is based on the new > LogiCoreIP design created. This driver provides the processing system > and programmable logic isolation. Set the frequency based on the clock > information get from the l

[PATCH v2 2/2] misc: Add Xilinx ZYNQMP VCU logicoreIP init driver

Xilinx ZYNQMP logicoreIP Init driver is based on the new LogiCoreIP design created. This driver provides the processing system and programmable logic isolation. Set the frequency based on the clock information get from the logicoreIP register set. It is put in drivers/misc as there is no subsystem