The WE_2_RE register specifies the number of clock cycles inserted
between the rising edge of #WE and the falling edge of #RE.
The current setup_data_interface implementation takes care of tWHR,
but tCCS is missing. Wait max(tCSS, tWHR) to meet the spec.
With setup_data_interface() is properly
The WE_2_RE register specifies the number of clock cycles inserted
between the rising edge of #WE and the falling edge of #RE.
The current setup_data_interface implementation takes care of tWHR,
but tCCS is missing. Wait max(tCSS, tWHR) to meet the spec.
With setup_data_interface() is properly
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