[PATCH v2 2/2] mtd: nand: denali: fix setup_data_interface to meet tCCS delay

2017-09-29 Thread Masahiro Yamada
The WE_2_RE register specifies the number of clock cycles inserted between the rising edge of #WE and the falling edge of #RE. The current setup_data_interface implementation takes care of tWHR, but tCCS is missing. Wait max(tCSS, tWHR) to meet the spec. With setup_data_interface() is properly

[PATCH v2 2/2] mtd: nand: denali: fix setup_data_interface to meet tCCS delay

2017-09-29 Thread Masahiro Yamada
The WE_2_RE register specifies the number of clock cycles inserted between the rising edge of #WE and the falling edge of #RE. The current setup_data_interface implementation takes care of tWHR, but tCCS is missing. Wait max(tCSS, tWHR) to meet the spec. With setup_data_interface() is properly