On Thu, Nov 5, 2020 at 10:56 AM Rajendra Nayak wrote:
> Add initial pinctrl driver to support pin configuration with
> pinctrl framework for SC7280 SoC
>
> Signed-off-by: Rajendra Nayak
> ---
> v2: Consolidated functions under phase_flag and qdss
> Moved ufs reset pin to pin175 so its expose
On Thu 05 Nov 03:56 CST 2020, Rajendra Nayak wrote:
> diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280.c
> b/drivers/pinctrl/qcom/pinctrl-sc7280.c
[..]
> +static const struct msm_pinctrl_soc_data sc7280_pinctrl = {
> + .pins = sc7280_pins,
> + .npins = ARRAY_SIZE(sc7280_pins),
> + .fun
On Thu, Nov 5, 2020 at 10:56 AM Rajendra Nayak wrote:
> Add initial pinctrl driver to support pin configuration with
> pinctrl framework for SC7280 SoC
>
> Signed-off-by: Rajendra Nayak
> ---
> v2: Consolidated functions under phase_flag and qdss
> Moved ufs reset pin to pin175 so its expose
Add initial pinctrl driver to support pin configuration with
pinctrl framework for SC7280 SoC
Signed-off-by: Rajendra Nayak
---
v2: Consolidated functions under phase_flag and qdss
Moved ufs reset pin to pin175 so its exposed as a gpio
npios updated from 175 to 176
drivers/pinctrl/qcom/
4 matches
Mail list logo