On 03/30/2015 03:13 PM, Stefan Agner wrote:
Hi Aaron,
Thanks for the fixes! Some comments below:
Thanks for the review!
On 2015-03-30 19:49, Aaron Brice wrote:
Add delay between chip select and clock signals, before clock starts and
after clock stops.
This 50ns are specifc to the SPI
On 03/30/2015 03:13 PM, Stefan Agner wrote:
Hi Aaron,
Thanks for the fixes! Some comments below:
Thanks for the review!
On 2015-03-30 19:49, Aaron Brice wrote:
Add delay between chip select and clock signals, before clock starts and
after clock stops.
This 50ns are specifc to the SPI
Hi Aaron,
Thanks for the fixes! Some comments below:
On 2015-03-30 19:49, Aaron Brice wrote:
> Add delay between chip select and clock signals, before clock starts and
> after clock stops.
This 50ns are specifc to the SPI slave at hand (SRAM) is this correct?
If yes, this would probably need
Add delay between chip select and clock signals, before clock starts and
after clock stops.
Signed-off-by: Aaron Brice
---
drivers/spi/spi-fsl-dspi.c | 53 --
1 file changed, 51 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-fsl-dspi.c
Add delay between chip select and clock signals, before clock starts and
after clock stops.
Signed-off-by: Aaron Brice aaron.br...@datasoft.com
---
drivers/spi/spi-fsl-dspi.c | 53 --
1 file changed, 51 insertions(+), 2 deletions(-)
diff --git
Hi Aaron,
Thanks for the fixes! Some comments below:
On 2015-03-30 19:49, Aaron Brice wrote:
Add delay between chip select and clock signals, before clock starts and
after clock stops.
This 50ns are specifc to the SPI slave at hand (SRAM) is this correct?
If yes, this would probably need new
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