On Wed, 29 Oct 2014, Steffen Trumtrar wrote:
> Hi!
>
> On Tue, Oct 28, 2014 at 04:19:03PM -0500, atull wrote:
> > On Fri, 24 Oct 2014, Steffen Trumtrar wrote:
> >
> > > Hi!
> > >
> >
> > Hi,
> >
> > I see that my documentation sucks and needs cleanup. I'll try to
> > answer some of the flame
On Wed, 29 Oct 2014, Pavel Machek wrote:
> Hi!
>
> > > > +Optional properties:
> > > > + - label : name that you want this bridge to show up as under
> > > > +/sys/class/fpga-bridge. Default is br if
> > > > this is
> > > > +not specified.
> > >
On Wed, 29 Oct 2014, Steffen Trumtrar wrote:
> On Wed, Oct 29, 2014 at 10:16:32AM +, Mark Brown wrote:
> > On Wed, Oct 29, 2014 at 08:57:01AM +0100, Steffen Trumtrar wrote:
> >
> > > So, that shouldn't be a problem though, as I already cooked up a driver
> > > for
> > > the L3 with all the r
On Wed, Oct 29, 2014 at 10:16:32AM +, Mark Brown wrote:
> On Wed, Oct 29, 2014 at 08:57:01AM +0100, Steffen Trumtrar wrote:
>
> > So, that shouldn't be a problem though, as I already cooked up a driver for
> > the L3 with all the ranges specified. The only thing I need to figure out
> > before
On Wed, Oct 29, 2014 at 08:57:01AM +0100, Steffen Trumtrar wrote:
> So, that shouldn't be a problem though, as I already cooked up a driver for
> the L3 with all the ranges specified. The only thing I need to figure out
> before I will post it, is how to nicely handle the WO remap register.
> I th
Hi!
> > > +Optional properties:
> > > + - label : name that you want this bridge to show up as under
> > > +/sys/class/fpga-bridge. Default is br if
> > > this is
> > > +not specified.
> > > +
> >
> > Why? Linux-specific.
>
> That was a convienc
Hi!
On Tue, Oct 28, 2014 at 04:19:03PM -0500, atull wrote:
> On Fri, 24 Oct 2014, Steffen Trumtrar wrote:
>
> > Hi!
> >
>
> Hi,
>
> I see that my documentation sucks and needs cleanup. I'll try to
> answer some of the flames and get a more coherent version out soon.
>
> > On Thu, Oct 23, 201
On Tue, 28 Oct 2014, atull wrote:
> On Fri, 24 Oct 2014, Steffen Trumtrar wrote:
> >
> > > + - init-val : 0 if driver should disable bridge at startup
> > > +1 if driver should enable bridge at startup
> > > +driver leaves bridge in current state if
On Fri, 24 Oct 2014, Steffen Trumtrar wrote:
> Hi!
>
Hi,
I see that my documentation sucks and needs cleanup. I'll try to
answer some of the flames and get a more coherent version out soon.
> On Thu, Oct 23, 2014 at 06:51:06PM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
>
Hi Steffen,
> On Oct 27, 2014, at 20:00 , Steffen Trumtrar
> wrote:
>
> On Mon, Oct 27, 2014 at 05:45:03PM +0200, Pantelis Antoniou wrote:
>> Hi Stefan,
>>
>>> On Oct 27, 2014, at 17:32 , Steffen Trumtrar
>>> wrote:
>>>
>>> On Mon, Oct 27, 2014 at 05:05:29PM +0200, Pantelis Antoniou wrote:
On Mon, Oct 27, 2014 at 05:45:03PM +0200, Pantelis Antoniou wrote:
> Hi Stefan,
>
> > On Oct 27, 2014, at 17:32 , Steffen Trumtrar
> > wrote:
> >
> > On Mon, Oct 27, 2014 at 05:05:29PM +0200, Pantelis Antoniou wrote:
> >> Hi Mark,
> >>
> >>> On Oct 27, 2014, at 17:01 , Mark Brown wrote:
> >>>
On Mon, Oct 27, 2014 at 05:52:02PM +0200, Pantelis Antoniou wrote:
> Hi Steffen,
>
> > On Oct 27, 2014, at 17:23 , Steffen Trumtrar
> > wrote:
> >
> > Hi!
> >
> > On Mon, Oct 27, 2014 at 01:54:20PM +0200, Pantelis Antoniou wrote:
> >> Hi Stefen,
> >>
> >>> On Oct 25, 2014, at 17:42 , Steffen
Hi Mark,
> On Oct 27, 2014, at 19:17 , Mark Brown wrote:
>
> On Mon, Oct 27, 2014 at 05:45:03PM +0200, Pantelis Antoniou wrote:
>
> Please fix your mail client to word wrap at less than 80 columns.
>
>> Well, it’s not my speciality, but my understanding is that FPGAs take
>> (considerable)
>>
On Mon, Oct 27, 2014 at 05:45:03PM +0200, Pantelis Antoniou wrote:
Please fix your mail client to word wrap at less than 80 columns.
> Well, it’s not my speciality, but my understanding is that FPGAs take
> (considerable)
> time to be programmed. If someone has already configured the ‘bus’ it is
Hi Steffen,
> On Oct 27, 2014, at 17:23 , Steffen Trumtrar
> wrote:
>
> Hi!
>
> On Mon, Oct 27, 2014 at 01:54:20PM +0200, Pantelis Antoniou wrote:
>> Hi Stefen,
>>
>>> On Oct 25, 2014, at 17:42 , Steffen Trumtrar
>>> wrote:
>>>
>>> Hi Pantelis!
>>>
>>> On Fri, Oct 24, 2014 at 12:20:53PM +
Hi Stefan,
> On Oct 27, 2014, at 17:32 , Steffen Trumtrar
> wrote:
>
> On Mon, Oct 27, 2014 at 05:05:29PM +0200, Pantelis Antoniou wrote:
>> Hi Mark,
>>
>>> On Oct 27, 2014, at 17:01 , Mark Brown wrote:
>>>
>>> On Mon, Oct 27, 2014 at 01:48:02PM +0200, Pantelis Antoniou wrote:
> On Oct 2
On Mon, Oct 27, 2014 at 05:05:29PM +0200, Pantelis Antoniou wrote:
> Hi Mark,
>
> > On Oct 27, 2014, at 17:01 , Mark Brown wrote:
> >
> > On Mon, Oct 27, 2014 at 01:48:02PM +0200, Pantelis Antoniou wrote:
> >>> On Oct 24, 2014, at 02:51 , at...@opensource.altera.com wrote:
> >
> >>> + - init-va
Hi!
On Mon, Oct 27, 2014 at 01:54:20PM +0200, Pantelis Antoniou wrote:
> Hi Stefen,
>
> > On Oct 25, 2014, at 17:42 , Steffen Trumtrar
> > wrote:
> >
> > Hi Pantelis!
> >
> > On Fri, Oct 24, 2014 at 12:20:53PM +0300, Pantelis Antoniou wrote:
> >> Hi Stefan, Allan,
> >>
> >> Sorry, haven’t ha
Hi Mark,
> On Oct 27, 2014, at 17:01 , Mark Brown wrote:
>
> On Mon, Oct 27, 2014 at 01:48:02PM +0200, Pantelis Antoniou wrote:
>>> On Oct 24, 2014, at 02:51 , at...@opensource.altera.com wrote:
>
>>> + - init-val : 0 if driver should disable bridge at startup
>>> +
On Mon, Oct 27, 2014 at 01:48:02PM +0200, Pantelis Antoniou wrote:
> > On Oct 24, 2014, at 02:51 , at...@opensource.altera.com wrote:
> > + - init-val : 0 if driver should disable bridge at startup
> > + 1 if driver should enable bridge at startup
> > +
Hi Stefen,
> On Oct 25, 2014, at 17:42 , Steffen Trumtrar
> wrote:
>
> Hi Pantelis!
>
> On Fri, Oct 24, 2014 at 12:20:53PM +0300, Pantelis Antoniou wrote:
>> Hi Stefan, Allan,
>>
>> Sorry, haven’t had a chance to review all this yet; will do so in the
>> weekend.
>> Just wanted to pop in and
Hi Alan,
> On Oct 24, 2014, at 02:51 , at...@opensource.altera.com wrote:
>
> From: Alan Tull
>
> Add DTS binding documentation for the Altera FPGA bridges.
>
> Signed-off-by: Alan Tull
> ---
> .../bindings/fpga/altera-fpga2sdram-bridge.txt | 57
> .../bindings/fpga/
Hi Pantelis!
On Fri, Oct 24, 2014 at 12:20:53PM +0300, Pantelis Antoniou wrote:
> Hi Stefan, Allan,
>
> Sorry, haven’t had a chance to review all this yet; will do so in the weekend.
> Just wanted to pop in and comment on a few things.
>
> > On Oct 24, 2014, at 10:00 AM, Steffen Trumtrar
> > w
On Thu 2014-10-23 18:51:06, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Add DTS binding documentation for the Altera FPGA bridges.
>
> Signed-off-by: Alan Tull
Acked-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff
Hi Stefan, Allan,
Sorry, haven’t had a chance to review all this yet; will do so in the weekend.
Just wanted to pop in and comment on a few things.
> On Oct 24, 2014, at 10:00 AM, Steffen Trumtrar
> wrote:
>
> Hi!
>
> On Thu, Oct 23, 2014 at 06:51:06PM -0500, at...@opensource.altera.com wrote
Hi!
On Thu, Oct 23, 2014 at 06:51:06PM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
(...)
> diff --git
> a/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
> b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
> new file mode 100644
> index
From: Alan Tull
Add DTS binding documentation for the Altera FPGA bridges.
Signed-off-by: Alan Tull
---
.../bindings/fpga/altera-fpga2sdram-bridge.txt | 57
.../bindings/fpga/altera-hps2fpga-bridge.txt | 53 ++
2 files changed, 110 insertions(
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